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https://github.com/Atmosphere-NX/Atmosphere
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dmnt-cheat: add other register source to new condition opcode
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parent
da664b49ad
commit
433b01aaf8
2 changed files with 29 additions and 2 deletions
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@ -153,6 +153,10 @@ void DmntCheatVm::LogOpcode(const CheatVmOpcode *opcode) {
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this->LogToDebugFile("Comp Type: Static Value\n");
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this->LogToDebugFile("Value: %lx\n", opcode->begin_reg_cond.value.bit64);
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break;
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case CompareRegisterValueType_OtherRegister:
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this->LogToDebugFile("Comp Type: Other Register\n");
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this->LogToDebugFile("X Reg Idx: %x\n", opcode->begin_reg_cond.other_reg_index);
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break;
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case CompareRegisterValueType_MemoryRelAddr:
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this->LogToDebugFile("Comp Type: Memory Relative Address\n");
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this->LogToDebugFile("Mem Type: %x\n", opcode->begin_reg_cond.mem_type);
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@ -396,16 +400,19 @@ bool DmntCheatVm::DecodeNextOpcode(CheatVmOpcode *out) {
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/* C0TcS2Ra aaaaaaaa */
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/* C0TcS3Rr */
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/* C0TcS400 VVVVVVVV (VVVVVVVV) */
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/* C0TcS5X0 */
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/* C0 = opcode 0xC0 */
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/* T = bit width */
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/* c = condition type. */
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/* S = source register. */
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/* X = value operand type, 0 = main/heap with relative offset, 1 = main/heap with offset register, */
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/* 2 = register with relative offset, 3 = register with offset register, 4 = static value. */
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/* 2 = register with relative offset, 3 = register with offset register, 4 = static value, 5 = other register. */
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/* M = memory type. */
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/* R = address register. */
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/* a = relative address. */
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/* r = offset register. */
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/* V = value */
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/* X = other register. */
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/* V = value. */
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opcode.begin_reg_cond.bit_width = (first_dword >> 20) & 0xF;
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opcode.begin_reg_cond.cond_type = (ConditionalComparisonType)((first_dword >> 16) & 0xF);
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opcode.begin_reg_cond.val_reg_index = ((first_dword >> 12) & 0xF);
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@ -415,6 +422,9 @@ bool DmntCheatVm::DecodeNextOpcode(CheatVmOpcode *out) {
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case CompareRegisterValueType_StaticValue:
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opcode.begin_reg_cond.value = GetNextVmInt(opcode.begin_reg_cond.bit_width);
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break;
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case CompareRegisterValueType_OtherRegister:
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opcode.begin_reg_cond.other_reg_index = ((first_dword >> 4) & 0xF);
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break;
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case CompareRegisterValueType_MemoryRelAddr:
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opcode.begin_reg_cond.mem_type = (MemoryAccessType)((first_dword >> 4) & 0xF);
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opcode.begin_reg_cond.rel_address = (((u64)(first_dword & 0xF) << 32ul) | ((u64)GetNextDword()));
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@ -855,6 +865,21 @@ void DmntCheatVm::Execute(const CheatProcessMetadata *metadata) {
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u64 cond_value = 0;
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if (cur_opcode.begin_reg_cond.comp_type == CompareRegisterValueType_StaticValue) {
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cond_value = GetVmInt(cur_opcode.begin_reg_cond.value, cur_opcode.begin_reg_cond.bit_width);
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} else if (cur_opcode.begin_reg_cond.comp_type == CompareRegisterValueType_OtherRegister) {
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switch (cur_opcode.begin_reg_cond.bit_width) {
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case 1:
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cond_value = static_cast<u8>(this->registers[cur_opcode.begin_reg_cond.other_reg_index] & 0xFFul);
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break;
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case 2:
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cond_value = static_cast<u16>(this->registers[cur_opcode.begin_reg_cond.other_reg_index] & 0xFFFFul);
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break;
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case 4:
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cond_value = static_cast<u32>(this->registers[cur_opcode.begin_reg_cond.other_reg_index] & 0xFFFFFFFFul);
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break;
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case 8:
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cond_value = static_cast<u64>(this->registers[cur_opcode.begin_reg_cond.other_reg_index] & 0xFFFFFFFFFFFFFFFFul);
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break;
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}
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} else {
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u64 cond_address = 0;
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switch (cur_opcode.begin_reg_cond.comp_type) {
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@ -87,6 +87,7 @@ enum CompareRegisterValueType : u32 {
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CompareRegisterValueType_RegisterRelAddr = 2,
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CompareRegisterValueType_RegisterOfsReg = 3,
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CompareRegisterValueType_StaticValue = 4,
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CompareRegisterValueType_OtherRegister = 5,
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};
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union VmInt {
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@ -180,6 +181,7 @@ struct BeginRegisterConditionalOpcode {
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CompareRegisterValueType comp_type;
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MemoryAccessType mem_type;
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u32 addr_reg_index;
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u32 other_reg_index;
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u32 ofs_reg_index;
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u64 rel_address;
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VmInt value;
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