git subrepo pull emummc

subrepo:
  subdir:   "emummc"
  merged:   "5f51fa3b"
upstream:
  origin:   "https://github.com/m4xw/emuMMC"
  branch:   "develop"
  commit:   "5f51fa3b"
git-subrepo:
  version:  "0.4.0"
  origin:   "https://github.com/ingydotnet/git-subrepo"
  commit:   "5d6aba9"

emummc/.gitrepo

@@ -6,7 +6,7 @@
 [subrepo]
 	remote = https://github.com/m4xw/emuMMC
 	branch = develop
-	commit = e935968d3bf18936c4f9c954619ac6f115e8dfde
+	commit = 5f51fa3b81d2b14b348f6e8579454007019fc7a6
-	parent = 169ec9c12e9506df33e72d4745f4f56745d411d2
+	parent = e871a754a87631c3036ca985ff1c223e00ef4dda
 	method = rebase
 	cmdver = 0.4.0

emummc/README.md

@@ -2,7 +2,7 @@
 *A SDMMC driver replacement for Nintendo's Filesystem Services, by **m4xw***  
 
 ### Supported Horizon Versions
-**1.0.0 - 8.0.1**
+**1.0.0 - 8.1.0**
 
 ## Features
 * Arbitrary SDMMC backend selection  

emummc/emummc.json

@@ -116,6 +116,7 @@
                 "svcReplyAndReceive": "0x43",
                 "svcReplyAndReceiveWithUserBuffer": "0x44",
                 "svcCreateEvent": "0x45",
+                "svcReadWriteRegister": "0x4E",
                 "svcCreateInterruptEvent": "0x53",
                 "svcQueryIoMapping": "0x55",
                 "svcCreateDeviceAddressSpace": "0x56",

emummc/source/FS/FS_offsets.c

@@ -47,23 +47,23 @@
 
 #define DEFINE_OFFSET_STRUCT(vers) \
 static const fs_offsets_t GET_OFFSET_STRUCT_NAME(vers) = { \
-    .sdmmc_accessor_gc           = FS_OFFSET##vers##_SDMMC_ACCESSOR_GC, \
+    .sdmmc_accessor_gc               = FS_OFFSET##vers##_SDMMC_ACCESSOR_GC, \
-    .sdmmc_accessor_sd           = FS_OFFSET##vers##_SDMMC_ACCESSOR_SD, \
+    .sdmmc_accessor_sd               = FS_OFFSET##vers##_SDMMC_ACCESSOR_SD, \
-    .sdmmc_accessor_nand         = FS_OFFSET##vers##_SDMMC_ACCESSOR_NAND, \
+    .sdmmc_accessor_nand             = FS_OFFSET##vers##_SDMMC_ACCESSOR_NAND, \
-    .sdmmc_wrapper_read          = FS_OFFSET##vers##_SDMMC_WRAPPER_READ, \
+    .sdmmc_wrapper_read              = FS_OFFSET##vers##_SDMMC_WRAPPER_READ, \
-    .sdmmc_wrapper_write         = FS_OFFSET##vers##_SDMMC_WRAPPER_WRITE, \
+    .sdmmc_wrapper_write             = FS_OFFSET##vers##_SDMMC_WRAPPER_WRITE, \
-    .clkrst_set_min_v_clock_rate = FS_OFFSET##vers##_CLKRST_SET_MIN_V_CLK_RATE, \
+    .clkrst_set_min_v_clock_rate     = FS_OFFSET##vers##_CLKRST_SET_MIN_V_CLK_RATE, \
-    .rtld                        = FS_OFFSET##vers##_RTLD, \
+    .rtld                            = FS_OFFSET##vers##_RTLD, \
-    .rtld_destination            = FS_OFFSET##vers##_RTLD_DESTINATION, \
+    .rtld_destination                = FS_OFFSET##vers##_RTLD_DESTINATION, \
-    .lock_mutex                  = FS_OFFSET##vers##_LOCK_MUTEX, \
+    .lock_mutex                      = FS_OFFSET##vers##_LOCK_MUTEX, \
-    .unlock_mutex                = FS_OFFSET##vers##_UNLOCK_MUTEX, \
+    .unlock_mutex                    = FS_OFFSET##vers##_UNLOCK_MUTEX, \
-    .sd_mutex                    = FS_OFFSET##vers##_SD_MUTEX, \
+    .sd_mutex                        = FS_OFFSET##vers##_SD_MUTEX, \
-    .nand_mutex                  = FS_OFFSET##vers##_NAND_MUTEX, \
+    .nand_mutex                      = FS_OFFSET##vers##_NAND_MUTEX, \
-    .active_partition            = FS_OFFSET##vers##_ACTIVE_PARTITION, \
+    .active_partition                = FS_OFFSET##vers##_ACTIVE_PARTITION, \
-    .sdmmc_das_handle            = FS_OFFSET##vers##_SDMMC_DAS_HANDLE, \
+    .sdmmc_das_handle                = FS_OFFSET##vers##_SDMMC_DAS_HANDLE, \
-    .shutdown_sd                 = FS_OFFSET##vers##_SHUTDOWN_SD, \
+    .sdmmc_accessor_controller_close = FS_OFFSET##vers##_SDMMC_WRAPPER_CONTROLLER_CLOSE, \
-    .sd_das_init                 = FS_OFFSET##vers##_SD_DAS_INIT, \
+    .sd_das_init                     = FS_OFFSET##vers##_SD_DAS_INIT, \
-    .nintendo_paths              = FS_OFFSET##vers##_NINTENDO_PATHS, \
+    .nintendo_paths                  = FS_OFFSET##vers##_NINTENDO_PATHS, \
 }
 
 // Actually define offset structs

emummc/source/FS/FS_offsets.h

@@ -41,13 +41,13 @@ typedef struct {
     // Misc funcs
     uintptr_t lock_mutex;
     uintptr_t unlock_mutex;
+    uintptr_t sdmmc_accessor_controller_close;
     // Misc data
     uintptr_t sd_mutex;
     uintptr_t nand_mutex;
     uintptr_t active_partition;
     uintptr_t sdmmc_das_handle;
     // NOPs
-    uintptr_t shutdown_sd;
     uintptr_t sd_das_init;
     // Nintendo Paths
     fs_offsets_nintendo_path_t nintendo_paths[];

emummc/source/FS/FS_structs.h

@@ -36,7 +36,7 @@ typedef struct sdmmc_accessor_vt
     void *map_device_addr_space;
     void *unmap_device_addr_space;
     void *controller_open;
-    void *controller_close;
+    uint64_t (*sdmmc_accessor_controller_close)(void *);
     uint64_t (*read_write)(void *, uint64_t, uint64_t, void *, uint64_t, uint64_t);
     // More not included because we don't use it.
 } sdmmc_accessor_vt_t;

emummc/source/FS/offsets/100.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_100_LOCK_MUTEX          0x2884
 #define FS_OFFSET_100_UNLOCK_MUTEX        0x28F0
 
+#define FS_OFFSET_100_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x6A8AC
+
 // Misc Data
 #define FS_OFFSET_100_SD_MUTEX            0xE36058
 #define FS_OFFSET_100_NAND_MUTEX          0xE30610
@@ -41,7 +43,6 @@
 #define FS_OFFSET_100_SDMMC_DAS_HANDLE    0xE2F730
 
 // NOPs
-#define FS_OFFSET_100_SHUTDOWN_SD         0x22548
 #define FS_OFFSET_100_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/200.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_200_LOCK_MUTEX          0x3264
 #define FS_OFFSET_200_UNLOCK_MUTEX        0x32D0
 
+#define FS_OFFSET_200_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x733F4
+
 // Misc Data
 #define FS_OFFSET_200_SD_MUTEX            0xE42268
 #define FS_OFFSET_200_NAND_MUTEX          0xE3CED0
@@ -41,7 +43,6 @@
 #define FS_OFFSET_200_SDMMC_DAS_HANDLE    0xE3BDD0
 
 // NOPs
-#define FS_OFFSET_200_SHUTDOWN_SD         0x20C48
 #define FS_OFFSET_200_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/200_exfat.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_200_EXFAT_LOCK_MUTEX          0x3264
 #define FS_OFFSET_200_EXFAT_UNLOCK_MUTEX        0x32D0
 
+#define FS_OFFSET_200_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x733F4
+
 // Misc Data
 #define FS_OFFSET_200_EXFAT_SD_MUTEX            0xF22268
 #define FS_OFFSET_200_EXFAT_NAND_MUTEX          0xF1CED0
@@ -41,7 +43,6 @@
 #define FS_OFFSET_200_EXFAT_SDMMC_DAS_HANDLE    0xF1BDD0
 
 // NOPs
-#define FS_OFFSET_200_EXFAT_SHUTDOWN_SD         0x20C48
 #define FS_OFFSET_200_EXFAT_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/210.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_210_LOCK_MUTEX          0x3264
 #define FS_OFFSET_210_UNLOCK_MUTEX        0x32D0
 
+#define FS_OFFSET_210_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x737D4
+
 // Misc Data
 #define FS_OFFSET_210_SD_MUTEX            0xE43268
 #define FS_OFFSET_210_NAND_MUTEX          0xE3DED0
@@ -41,7 +43,6 @@
 #define FS_OFFSET_210_SDMMC_DAS_HANDLE    0xE3CDD0
 
 // NOPs
-#define FS_OFFSET_210_SHUTDOWN_SD         0x20E60
 #define FS_OFFSET_210_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/210_exfat.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_210_EXFAT_LOCK_MUTEX          0x3264
 #define FS_OFFSET_210_EXFAT_UNLOCK_MUTEX        0x32D0
 
+#define FS_OFFSET_210_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x737D4
+
 // Misc Data
 #define FS_OFFSET_210_EXFAT_SD_MUTEX            0xF22268
 #define FS_OFFSET_210_EXFAT_NAND_MUTEX          0xF1CED0
@@ -41,7 +43,6 @@
 #define FS_OFFSET_210_EXFAT_SDMMC_DAS_HANDLE    0xF1BDD0
 
 // NOPs
-#define FS_OFFSET_210_EXFAT_SHUTDOWN_SD         0x20E60
 #define FS_OFFSET_210_EXFAT_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/300.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_300_LOCK_MUTEX          0x35CC
 #define FS_OFFSET_300_UNLOCK_MUTEX        0x3638
 
+#define FS_OFFSET_300_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x8A270
+
 // Misc Data
 #define FS_OFFSET_300_SD_MUTEX            0xE69268
 #define FS_OFFSET_300_NAND_MUTEX          0xE646F0
@@ -41,7 +43,6 @@
 #define FS_OFFSET_300_SDMMC_DAS_HANDLE    0xE635A0
 
 // NOPs
-#define FS_OFFSET_300_SHUTDOWN_SD         0x258D8
 #define FS_OFFSET_300_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/300_exfat.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_300_EXFAT_LOCK_MUTEX          0x35CC
 #define FS_OFFSET_300_EXFAT_UNLOCK_MUTEX        0x3638
 
+#define FS_OFFSET_300_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x8A270
+
 // Misc Data
 #define FS_OFFSET_300_EXFAT_SD_MUTEX            0xF4C268
 #define FS_OFFSET_300_EXFAT_NAND_MUTEX          0xF476F0
@@ -41,7 +43,6 @@
 #define FS_OFFSET_300_EXFAT_SDMMC_DAS_HANDLE    0xF465A0
 
 // NOPs
-#define FS_OFFSET_300_EXFAT_SHUTDOWN_SD         0x258D8
 #define FS_OFFSET_300_EXFAT_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/301.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_301_LOCK_MUTEX          0x3638
 #define FS_OFFSET_301_UNLOCK_MUTEX        0x36A4
 
+#define FS_OFFSET_301_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x8A32C
+
 // Misc Data
 #define FS_OFFSET_301_SD_MUTEX            0xE69268
 #define FS_OFFSET_301_NAND_MUTEX          0xE646F0
@@ -41,7 +43,6 @@
 #define FS_OFFSET_301_SDMMC_DAS_HANDLE    0xE635A0
 
 // NOPs
-#define FS_OFFSET_301_SHUTDOWN_SD         0x25944
 #define FS_OFFSET_301_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/301_exfat.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_301_EXFAT_LOCK_MUTEX          0x3638
 #define FS_OFFSET_301_EXFAT_UNLOCK_MUTEX        0x36A4
 
+#define FS_OFFSET_301_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x8A32C
+
 // Misc Data
 #define FS_OFFSET_301_EXFAT_SD_MUTEX            0xF4C268
 #define FS_OFFSET_301_EXFAT_NAND_MUTEX          0xF476F0
@@ -41,7 +43,6 @@
 #define FS_OFFSET_301_EXFAT_SDMMC_DAS_HANDLE    0xF465A0
 
 // NOPs
-#define FS_OFFSET_301_EXFAT_SHUTDOWN_SD         0x25944
 #define FS_OFFSET_301_EXFAT_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/400.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_400_LOCK_MUTEX          0x39A0
 #define FS_OFFSET_400_UNLOCK_MUTEX        0x3A0C
 
+#define FS_OFFSET_400_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x9DB48
+
 // Misc Data
 #define FS_OFFSET_400_SD_MUTEX            0xE80268
 #define FS_OFFSET_400_NAND_MUTEX          0xE7BC60
@@ -41,7 +43,6 @@
 #define FS_OFFSET_400_SDMMC_DAS_HANDLE    0xE7ABF0
 
 // NOPs
-#define FS_OFFSET_400_SHUTDOWN_SD         0x32D70
 #define FS_OFFSET_400_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/400_exfat.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_400_EXFAT_LOCK_MUTEX          0x39A0
 #define FS_OFFSET_400_EXFAT_UNLOCK_MUTEX        0x3A0C
 
+#define FS_OFFSET_400_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x9DB48
+
 // Misc Data
 #define FS_OFFSET_400_EXFAT_SD_MUTEX            0xF63268
 #define FS_OFFSET_400_EXFAT_NAND_MUTEX          0xF5EC60
@@ -41,7 +43,6 @@
 #define FS_OFFSET_400_EXFAT_SDMMC_DAS_HANDLE    0xF5DBF0
 
 // NOPs
-#define FS_OFFSET_400_EXFAT_SHUTDOWN_SD         0x32D70
 #define FS_OFFSET_400_EXFAT_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/410.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_410_LOCK_MUTEX          0x39A0
 #define FS_OFFSET_410_UNLOCK_MUTEX        0x3A0C
 
+#define FS_OFFSET_410_SDMMC_WRAPPER_CONTROLLER_CLOSE        0x9DBAC
+
 // Misc Data
 #define FS_OFFSET_410_SD_MUTEX            0xE80268
 #define FS_OFFSET_410_NAND_MUTEX          0xE7BC60
@@ -41,7 +43,6 @@
 #define FS_OFFSET_410_SDMMC_DAS_HANDLE    0xE7ABF0
 
 // NOPs
-#define FS_OFFSET_410_SHUTDOWN_SD         0x32D70
 #define FS_OFFSET_410_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/410_exfat.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_410_EXFAT_LOCK_MUTEX          0x39A0
 #define FS_OFFSET_410_EXFAT_UNLOCK_MUTEX        0x3A0C
 
+#define FS_OFFSET_410_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x9DBAC
+
 // Misc Data
 #define FS_OFFSET_410_EXFAT_SD_MUTEX            0xF63268
 #define FS_OFFSET_410_EXFAT_NAND_MUTEX          0xF5EC60
@@ -41,7 +43,6 @@
 #define FS_OFFSET_410_EXFAT_SDMMC_DAS_HANDLE    0xF5DBF0
 
 // NOPs
-#define FS_OFFSET_410_EXFAT_SHUTDOWN_SD         0x32D70
 #define FS_OFFSET_410_EXFAT_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/500.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_500_LOCK_MUTEX          0x4080
 #define FS_OFFSET_500_UNLOCK_MUTEX        0x40D0
 
+#define FS_OFFSET_500_SDMMC_WRAPPER_CONTROLLER_CLOSE 0xC9380
+
 // Misc Data
 #define FS_OFFSET_500_SD_MUTEX            0xEC3268
 #define FS_OFFSET_500_NAND_MUTEX          0xEBDE58
@@ -41,7 +43,6 @@
 #define FS_OFFSET_500_SDMMC_DAS_HANDLE    0xEBCE30
 
 // NOPs
-#define FS_OFFSET_500_SHUTDOWN_SD         0x443E8
 #define FS_OFFSET_500_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/500_exfat.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_500_EXFAT_LOCK_MUTEX          0x4080
 #define FS_OFFSET_500_EXFAT_UNLOCK_MUTEX        0x40D0
 
+#define FS_OFFSET_500_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0xC9380
+
 // Misc Data
 #define FS_OFFSET_500_EXFAT_SD_MUTEX            0xFA8268
 #define FS_OFFSET_500_EXFAT_NAND_MUTEX          0xFA2E58
@@ -41,7 +43,6 @@
 #define FS_OFFSET_500_EXFAT_SDMMC_DAS_HANDLE    0xFA1E30
 
 // NOPs
-#define FS_OFFSET_500_EXFAT_SHUTDOWN_SD         0x443E8
 #define FS_OFFSET_500_EXFAT_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/510.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_510_LOCK_MUTEX          0x4080
 #define FS_OFFSET_510_UNLOCK_MUTEX        0x40D0
 
+#define FS_OFFSET_510_SDMMC_WRAPPER_CONTROLLER_CLOSE 0xC9750
+
 // Misc Data
 #define FS_OFFSET_510_SD_MUTEX            0xEC4268
 #define FS_OFFSET_510_NAND_MUTEX          0xEBEE58
@@ -41,7 +43,6 @@
 #define FS_OFFSET_510_SDMMC_DAS_HANDLE    0xEBDE30
 
 // NOPs
-#define FS_OFFSET_510_SHUTDOWN_SD         0x44578
 #define FS_OFFSET_510_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/510_exfat.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_510_EXFAT_LOCK_MUTEX          0x4080
 #define FS_OFFSET_510_EXFAT_UNLOCK_MUTEX        0x40D0
 
+#define FS_OFFSET_510_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0xC9750
+
 // Misc Data
 #define FS_OFFSET_510_EXFAT_SD_MUTEX            0xFA9268
 #define FS_OFFSET_510_EXFAT_NAND_MUTEX          0xFA3E58
@@ -41,7 +43,6 @@
 #define FS_OFFSET_510_EXFAT_SDMMC_DAS_HANDLE    0xFA2E30
 
 // NOPs
-#define FS_OFFSET_510_EXFAT_SHUTDOWN_SD         0x44578
 #define FS_OFFSET_510_EXFAT_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/600.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_600_LOCK_MUTEX          0x1412C0
 #define FS_OFFSET_600_UNLOCK_MUTEX        0x141310
 
+#define FS_OFFSET_600_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x148500
+
 // Misc Data
 #define FS_OFFSET_600_SD_MUTEX            0xF06268
 #define FS_OFFSET_600_NAND_MUTEX          0xF01BA0
@@ -41,7 +43,6 @@
 #define FS_OFFSET_600_SDMMC_DAS_HANDLE    0xE01670
 
 // NOPs
-#define FS_OFFSET_600_SHUTDOWN_SD         0xB2F28
 #define FS_OFFSET_600_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/600_exfat.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_600_EXFAT_LOCK_MUTEX          0x14C9C0
 #define FS_OFFSET_600_EXFAT_UNLOCK_MUTEX        0x14CA10
 
+#define FS_OFFSET_600_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x153C00
+
 // Misc Data
 #define FS_OFFSET_600_EXFAT_SD_MUTEX            0xFEB268
 #define FS_OFFSET_600_EXFAT_NAND_MUTEX          0xFE6BA0
@@ -41,7 +43,6 @@
 #define FS_OFFSET_600_EXFAT_SDMMC_DAS_HANDLE    0xEE6670
 
 // NOPs
-#define FS_OFFSET_600_EXFAT_SHUTDOWN_SD         0xBE628
 #define FS_OFFSET_600_EXFAT_SD_DAS_INIT         0x0
 
 // Nintendo Paths

emummc/source/FS/offsets/700.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_700_LOCK_MUTEX          0x148A90
 #define FS_OFFSET_700_UNLOCK_MUTEX        0x148AE0
 
+#define FS_OFFSET_700_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x14FD50
+
 // Misc Data
 #define FS_OFFSET_700_SD_MUTEX            0xF123E8
 #define FS_OFFSET_700_NAND_MUTEX          0xF0DBE8
@@ -41,7 +43,6 @@
 #define FS_OFFSET_700_SDMMC_DAS_HANDLE    0xE0E7A0
 
 // NOPs
-#define FS_OFFSET_700_SHUTDOWN_SD         0xB8FCC
 #define FS_OFFSET_700_SD_DAS_INIT         0x85FE8
 
 // Nintendo Paths

emummc/source/FS/offsets/700_exfat.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_700_EXFAT_LOCK_MUTEX          0x154040
 #define FS_OFFSET_700_EXFAT_UNLOCK_MUTEX        0x154090
 
+#define FS_OFFSET_700_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x15B300
+
 // Misc Data
 #define FS_OFFSET_700_EXFAT_SD_MUTEX            0xFF73E8
 #define FS_OFFSET_700_EXFAT_NAND_MUTEX          0xFF2BE8
@@ -41,7 +43,6 @@
 #define FS_OFFSET_700_EXFAT_SDMMC_DAS_HANDLE    0xEF3A00
 
 // NOPs
-#define FS_OFFSET_700_EXFAT_SHUTDOWN_SD         0xC457C
 #define FS_OFFSET_700_EXFAT_SD_DAS_INIT         0x91598
 
 // Nintendo Paths

emummc/source/FS/offsets/800.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_800_LOCK_MUTEX          0x14B6D0
 #define FS_OFFSET_800_UNLOCK_MUTEX        0x14B720
 
+#define FS_OFFSET_800_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x1529E0
+
 // Misc Data
 #define FS_OFFSET_800_SD_MUTEX            0xF1A3E8
 #define FS_OFFSET_800_NAND_MUTEX          0xF15BE8
@@ -41,7 +43,6 @@
 #define FS_OFFSET_800_SDMMC_DAS_HANDLE    0xE167C0
 
 // NOPs
-#define FS_OFFSET_800_SHUTDOWN_SD         0xBAF6C
 #define FS_OFFSET_800_SD_DAS_INIT         0x87D58
 
 // Nintendo Paths

emummc/source/FS/offsets/800_exfat.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_800_EXFAT_LOCK_MUTEX          0x156C80
 #define FS_OFFSET_800_EXFAT_UNLOCK_MUTEX        0x156CD0
 
+#define FS_OFFSET_800_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x15DF90
+
 // Misc Data
 #define FS_OFFSET_800_EXFAT_SD_MUTEX            0xFFE3E8
 #define FS_OFFSET_800_EXFAT_NAND_MUTEX          0xFF9BE8
@@ -41,7 +43,6 @@
 #define FS_OFFSET_800_EXFAT_SDMMC_DAS_HANDLE    0xEFAA20
 
 // NOPs
-#define FS_OFFSET_800_EXFAT_SHUTDOWN_SD         0xC651C
 #define FS_OFFSET_800_EXFAT_SD_DAS_INIT         0x93308
 
 // Nintendo Paths

emummc/source/FS/offsets/810.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_810_LOCK_MUTEX          0x14B6D0
 #define FS_OFFSET_810_UNLOCK_MUTEX        0x14B720
 
+#define FS_OFFSET_810_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x1529E0
+
 // Misc Data
 #define FS_OFFSET_810_SD_MUTEX            0xF1A3E8
 #define FS_OFFSET_810_NAND_MUTEX          0xF15BE8
@@ -41,7 +43,6 @@
 #define FS_OFFSET_810_SDMMC_DAS_HANDLE    0xE167C0
 
 // NOPs
-#define FS_OFFSET_810_SHUTDOWN_SD         0xBAF6C
 #define FS_OFFSET_810_SD_DAS_INIT         0x87D58
 
 // Nintendo Paths

emummc/source/FS/offsets/810_exfat.h

@@ -34,6 +34,8 @@
 #define FS_OFFSET_810_EXFAT_LOCK_MUTEX          0x156C80
 #define FS_OFFSET_810_EXFAT_UNLOCK_MUTEX        0x156CD0
 
+#define FS_OFFSET_810_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x15DF90
+
 // Misc Data
 #define FS_OFFSET_810_EXFAT_SD_MUTEX            0xFFE3E8
 #define FS_OFFSET_810_EXFAT_NAND_MUTEX          0xFF9BE8
@@ -41,7 +43,6 @@
 #define FS_OFFSET_810_EXFAT_SDMMC_DAS_HANDLE    0xEFAA20
 
 // NOPs
-#define FS_OFFSET_810_EXFAT_SHUTDOWN_SD         0xC651C
 #define FS_OFFSET_810_EXFAT_SD_DAS_INIT         0x93308
 
 // Nintendo Paths

emummc/source/emmc/sdmmc.c

@@ -24,11 +24,13 @@
 #include "../utils/types.h"
 #include "../utils/util.h"
 #include "../utils/fatal.h"
+#include "../emuMMC/emummc.h"
 
 #define DPRINTF(...) //fprintf(stdout, __VA_ARGS__)
 
 sdmmc_accessor_t *_current_accessor = NULL;
 bool sdmmc_memcpy_buf = false;
+extern bool custom_driver;
 
 static inline u32 unstuff_bits(u32 *resp, u32 start, u32 size)
 {
@@ -52,25 +54,25 @@ intptr_t sdmmc_calculate_dma_addr(sdmmc_accessor_t *_this, void *buf, unsigned i
     char *_buf = (char *)buf;
     char *actual_buf_start = _buf;
     char *actual_buf_end = &_buf[512 * num_sectors];
-    char *dma_buffer_start = _this->parent->dmaBuffers[FS_SDMMC_EMMC].device_addr_buffer;
+    char *dma_buffer_start = _this->parent->dmaBuffers[0].device_addr_buffer;
 
-    if (dma_buffer_start <= _buf && actual_buf_end <= &dma_buffer_start[_this->parent->dmaBuffers[FS_SDMMC_EMMC].device_addr_buffer_size])
+    if (dma_buffer_start <= _buf && actual_buf_end <= &dma_buffer_start[_this->parent->dmaBuffers[0].device_addr_buffer_size])
     {
-        dma_buf_idx = FS_SDMMC_EMMC;
+        dma_buf_idx = 0;
     }
     else
     {
-        dma_buffer_start = _this->parent->dmaBuffers[FS_SDMMC_SD].device_addr_buffer;
+        dma_buffer_start = _this->parent->dmaBuffers[1].device_addr_buffer;
-        if (dma_buffer_start <= actual_buf_start && actual_buf_end <= &dma_buffer_start[_this->parent->dmaBuffers[FS_SDMMC_SD].device_addr_buffer_size])
+        if (dma_buffer_start <= actual_buf_start && actual_buf_end <= &dma_buffer_start[_this->parent->dmaBuffers[1].device_addr_buffer_size])
         {
-            dma_buf_idx = FS_SDMMC_SD;
+            dma_buf_idx = 1;
         }
         else
         {
-            dma_buffer_start = _this->parent->dmaBuffers[FS_SDMMC_GC].device_addr_buffer;
+            dma_buffer_start = _this->parent->dmaBuffers[2].device_addr_buffer;
-            if (dma_buffer_start <= actual_buf_start && actual_buf_end <= &dma_buffer_start[_this->parent->dmaBuffers[FS_SDMMC_GC].device_addr_buffer_size])
+            if (dma_buffer_start <= actual_buf_start && actual_buf_end <= &dma_buffer_start[_this->parent->dmaBuffers[2].device_addr_buffer_size])
             {
-                dma_buf_idx = FS_SDMMC_GC;
+                dma_buf_idx = 2;
             }
             else
             {
@@ -86,30 +88,69 @@ intptr_t sdmmc_calculate_dma_addr(sdmmc_accessor_t *_this, void *buf, unsigned i
     return admaaddr;
 }
 
-int sdmmc_get_fitting_dma_index(sdmmc_accessor_t *_this, unsigned int num_sectors)
+int sdmmc_calculate_dma_index(sdmmc_accessor_t *_this, void *buf, unsigned int num_sectors)
 {
     int dma_buf_idx = 0;
-	int blkSize = num_sectors * 512;
+    char *_buf = (char *)buf;
+    char *actual_buf_start = _buf;
+    char *actual_buf_end = &_buf[512 * num_sectors];
+    char *dma_buffer_start = _this->parent->dmaBuffers[0].device_addr_buffer;
 
-    if (_this->parent->dmaBuffers[FS_SDMMC_EMMC].device_addr_buffer_size >= blkSize)
+    if (dma_buffer_start <= _buf && actual_buf_end <= &dma_buffer_start[_this->parent->dmaBuffers[0].device_addr_buffer_size])
     {
-        dma_buf_idx = FS_SDMMC_EMMC;
+        dma_buf_idx = 0;
     }
     else
     {
-        if (_this->parent->dmaBuffers[FS_SDMMC_SD].device_addr_buffer_size >= blkSize)
+        dma_buffer_start = _this->parent->dmaBuffers[1].device_addr_buffer;
+        if (dma_buffer_start <= actual_buf_start && actual_buf_end <= &dma_buffer_start[_this->parent->dmaBuffers[1].device_addr_buffer_size])
         {
-            dma_buf_idx = FS_SDMMC_SD;
+            dma_buf_idx = 1;
         }
         else
         {
-            if (_this->parent->dmaBuffers[FS_SDMMC_GC].device_addr_buffer_size >= blkSize)
+            dma_buffer_start = _this->parent->dmaBuffers[2].device_addr_buffer;
+            if (dma_buffer_start <= actual_buf_start && actual_buf_end <= &dma_buffer_start[_this->parent->dmaBuffers[2].device_addr_buffer_size])
             {
-                dma_buf_idx = FS_SDMMC_GC;
+                dma_buf_idx = 2;
             }
             else
             {
                 // If buffer is on a random heap
+                return -1;
+            }
+        }
+    }
+
+	sdmmc_memcpy_buf = false;
+
+    return dma_buf_idx;
+}
+
+int sdmmc_calculate_fitting_dma_index(sdmmc_accessor_t *_this, unsigned int num_sectors)
+{
+    int dma_buf_idx = 0;
+	int blkSize = num_sectors * 512;
+
+    if (_this->parent->dmaBuffers[0].device_addr_buffer_size >= blkSize)
+    {
+        dma_buf_idx = 0;
+    }
+    else
+    {
+        if (_this->parent->dmaBuffers[1].device_addr_buffer_size >= blkSize)
+        {
+            dma_buf_idx = 1;
+        }
+        else
+        {
+            if (_this->parent->dmaBuffers[2].device_addr_buffer_size >= blkSize)
+            {
+                dma_buf_idx = 2;
+            }
+            else
+            {
+                // Can't find a fitting buffer
                 return 0;
             }
         }
@@ -266,14 +307,112 @@ out:;
 	return 1;
 }
 
+extern _sdmmc_accessor_sd sdmmc_accessor_sd;
+extern _sdmmc_accessor_nand sdmmc_accessor_nand;
 int sdmmc_storage_read(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf)
 {
-	return _sdmmc_storage_readwrite(storage, sector, num_sectors, buf, 0);
+	if (!custom_driver)
+	{
+		sdmmc_accessor_t *accessor_sd = sdmmc_accessor_sd();
+		sdmmc_accessor_t *accessor_nand = sdmmc_accessor_nand();
+
+		if (sdmmc_calculate_dma_addr(accessor_sd, buf, num_sectors))
+		{
+			return !accessor_sd->vtab->read_write(accessor_sd, sector, num_sectors, buf, num_sectors * 512, 1);
+		}
+		else
+		{
+			if (sdmmc_calculate_dma_addr(accessor_nand, buf, num_sectors))
+			{
+				// buf is on the nand dma buffer
+				int original_dma_idx = sdmmc_calculate_dma_index(accessor_nand, buf, num_sectors);
+				sdmmc_dma_buffer_t *original_dma_buffer = &accessor_nand->parent->dmaBuffers[original_dma_idx];
+
+				// Next entry
+				int dma_idx = sdmmc_calculate_fitting_dma_index(accessor_sd, num_sectors) + 1;
+				
+				accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer = original_dma_buffer->device_addr_buffer;
+				accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer_masked = original_dma_buffer->device_addr_buffer_masked;
+				accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer_size = original_dma_buffer->device_addr_buffer_size;
+
+				u64 res = accessor_sd->vtab->read_write(accessor_sd, sector, num_sectors, buf, num_sectors * 512, 1);
+
+				accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer = 0;
+				accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer_masked = 0;
+				accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer_size = 0;
+
+				return !res;
+			}
+			else
+			{
+				// buf is on a heap
+				int dma_idx = sdmmc_calculate_fitting_dma_index(accessor_sd, num_sectors);
+				void *dma_buf = &accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer[0];
+
+				u64 res = accessor_sd->vtab->read_write(accessor_sd, sector, num_sectors, dma_buf, num_sectors * 512, 1);
+				memcpy(buf, dma_buf, num_sectors * 512);
+
+				return !res;
+			}
+		}
+	}
+	else
+	{
+		return _sdmmc_storage_readwrite(storage, sector, num_sectors, buf, 0);
+	}
 }
 
 int sdmmc_storage_write(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf)
 {
-	return _sdmmc_storage_readwrite(storage, sector, num_sectors, buf, 1);
+	if (!custom_driver)
+	{
+		sdmmc_accessor_t *accessor_sd = sdmmc_accessor_sd();
+		sdmmc_accessor_t *accessor_nand = sdmmc_accessor_nand();
+
+		if (sdmmc_calculate_dma_addr(accessor_sd, buf, num_sectors))
+		{
+			return !accessor_sd->vtab->read_write(accessor_sd, sector, num_sectors, buf, num_sectors * 512, 0);
+		}
+		else
+		{
+			if (sdmmc_calculate_dma_addr(accessor_nand, buf, num_sectors))
+			{
+				// buf is on the nand dma buffer
+				int original_dma_idx = sdmmc_calculate_dma_index(accessor_nand, buf, num_sectors);
+				sdmmc_dma_buffer_t *original_dma_buffer = &accessor_nand->parent->dmaBuffers[original_dma_idx];
+
+				// Next entry
+				int dma_idx = sdmmc_calculate_fitting_dma_index(accessor_sd, num_sectors) + 1;
+
+				accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer = original_dma_buffer->device_addr_buffer;
+				accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer_masked = original_dma_buffer->device_addr_buffer_masked;
+				accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer_size = original_dma_buffer->device_addr_buffer_size;
+
+				u64 res = accessor_sd->vtab->read_write(accessor_sd, sector, num_sectors, buf, num_sectors * 512, 0);
+				
+				accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer = 0;
+				accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer_masked = 0;
+				accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer_size = 0;
+
+				return !res;
+			}
+			else
+			{
+				// buf is on a heap
+				int dma_idx = sdmmc_calculate_fitting_dma_index(accessor_sd, num_sectors);
+				void *dma_buf = &accessor_sd->parent->dmaBuffers[dma_idx].device_addr_buffer[0];
+
+				memcpy(dma_buf, buf, num_sectors * 512);
+				u64 res = accessor_sd->vtab->read_write(accessor_sd, sector, num_sectors, dma_buf, num_sectors * 512, 0);
+
+				return !res;
+			}
+		}
+	}
+	else
+	{
+		return _sdmmc_storage_readwrite(storage, sector, num_sectors, buf, 1);
+	}
 }
 
 /*
@@ -703,7 +842,7 @@ static int _sd_storage_get_op_cond(sdmmc_storage_t *storage, int is_version_1, i
 			if (cond & SD_OCR_CCS)
 				storage->has_sector_access = 1;
 
-			if (false && cond & SD_ROCR_S18A && supports_low_voltage)
+			if (cond & SD_ROCR_S18A && supports_low_voltage)
 			{
 				//The low voltage regulator configuration is valid for SDMMC1 only.
 				if (storage->sdmmc->id == SDMMC_1 &&

emummc/source/emmc/sdmmc.h

@@ -114,6 +114,7 @@ int sdmmc_storage_set_mmc_partition(sdmmc_storage_t *storage, u32 partition);
 int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32 bus_width, u32 type);
 int sdmmc_storage_init_gc(sdmmc_storage_t *storage, sdmmc_t *sdmmc);
 intptr_t sdmmc_calculate_dma_addr(sdmmc_accessor_t *_this, void *buf, unsigned int num_sectors);
-int sdmmc_get_fitting_dma_index(sdmmc_accessor_t *_this, unsigned int num_sectors);
+int sdmmc_calculate_dma_index(sdmmc_accessor_t *_this, void *buf, unsigned int num_sectors);
+int sdmmc_calculate_fitting_dma_index(sdmmc_accessor_t *_this, unsigned int num_sectors);
 
 #endif

emummc/source/emmc/sdmmc_driver.c

@@ -641,23 +641,6 @@ static int _sdmmc_autocal_config_offset(sdmmc_t *sdmmc, u32 power)
 
 static void _sdmmc_autocal_execute(sdmmc_t *sdmmc, u32 power)
 {
-	if(sdmmc->id == SDMMC_1)
-	{
-		static int last_power = SDMMC_POWER_3_3;
-		if(power == SDMMC_POWER_1_8 && last_power == SDMMC_POWER_3_3)
-		{
-			last_power = power = SDMMC_POWER_1_8;
-			if (!_sdmmc_autocal_config_offset(sdmmc, power))
-				return;
-		} 
-		else if(power == SDMMC_POWER_3_3 && last_power == SDMMC_POWER_1_8)
-		{
-			last_power = power = SDMMC_POWER_3_3;
-			if (!_sdmmc_autocal_config_offset(sdmmc, power))
-				return;
-		}
-	}
-		
 	bool should_enable_sd_clock = false;
 	if (sdmmc->regs->clkcon & TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE)
 	{
@@ -811,7 +794,7 @@ static int _sdmmc_config_dma(sdmmc_t *sdmmc, u32 *blkcnt_out, sdmmc_req_t *req)
 	if (!admaaddr)
 	{
 		// buf is on a heap
-		int dma_idx = sdmmc_get_fitting_dma_index(_current_accessor, blkcnt);
+		int dma_idx = sdmmc_calculate_fitting_dma_index(_current_accessor, blkcnt);
 		admaaddr = (u64)&_current_accessor->parent->dmaBuffers[dma_idx].device_addr_buffer_masked[0];
 		sdmmc->last_dma_idx = dma_idx;
 	}
@@ -1011,10 +994,13 @@ static int _sdmmc_config_sdmmc1()
 	PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT1) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_PULL_UP;
 	PINMUX_AUX(PINMUX_AUX_SDMMC1_DAT0) = PINMUX_DRIVE_2X | PINMUX_INPUT_ENABLE | PINMUX_PARKED | PINMUX_PULL_UP;
 
+	//Make sure SDMMC1 controller is reset.
+	smcReadWriteRegister(PMC_BASE + APBDEV_PMC_NO_IOPOWER, (1 << 12), (1 << 12));
+	usleep(1000);
+
 	//Make sure the SDMMC1 controller is powered.
-	//PMC(APBDEV_PMC_NO_IOPOWER) &= ~(1 << 12);
+	smcReadWriteRegister(PMC_BASE + APBDEV_PMC_NO_IOPOWER, ~(1 << 12), (1 << 12));
-	//Assume 3.3V SD card voltage.
+	smcReadWriteRegister(PMC_BASE + APBDEV_PMC_PWR_DET_VAL, (1 << 12), (1 << 12));
-	//PMC(APBDEV_PMC_PWR_DET_VAL) |= (1 << 12);
 
 	//Set enable SD card power.
 	PINMUX_AUX(PINMUX_AUX_DMIC3_CLK) = PINMUX_INPUT_ENABLE | PINMUX_PULL_DOWN | 1; //GPIO control, pull down.
@@ -1025,10 +1011,10 @@ static int _sdmmc_config_sdmmc1()
 	usleep(1000);
 
 	//Enable SD card power.
-	//max77620_regulator_set_voltage(REGULATOR_LDO2, 3300000);
+	max77620_regulator_set_voltage(REGULATOR_LDO2, 3300000);
-	//max77620_regulator_enable(REGULATOR_LDO2, 1);
+	max77620_regulator_enable(REGULATOR_LDO2, 1);
 
-	//usleep(1000);
+	usleep(1000);
 
 	//For good measure.
 	APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) = 0x10000000;
@@ -1071,7 +1057,7 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int n
 	sdmmc->regs->veniotrimctl &= 0xFFFFFFFB;
 	static const u32 trim_values[] = { 2, 8, 3, 8 };
 	sdmmc->regs->venclkctl = (sdmmc->regs->venclkctl & 0xE0FFFFFF) | (trim_values[sdmmc->id] << 24);
-	sdmmc->regs->sdmemcmppadctl = (sdmmc->regs->sdmemcmppadctl & 0xF) | 7;
+	sdmmc->regs->sdmemcmppadctl = (sdmmc->regs->sdmemcmppadctl & 0xFFFFFFF0) | 7;
 	if (!_sdmmc_autocal_config_offset(sdmmc, power))
 		return 0;
 	_sdmmc_autocal_execute(sdmmc, power);
@@ -1103,8 +1089,9 @@ void sdmmc_end(sdmmc_t *sdmmc)
 		if (sdmmc->id == SDMMC_1)
 		{
 			gpio_output_enable(GPIO_PORT_E, GPIO_PIN_4, GPIO_OUTPUT_DISABLE);
-			//max77620_regulator_enable(REGULATOR_LDO2, 0);
+			msleep(1); // To power cycle min 1ms without power is needed.
-			msleep(100); // To power cycle min 1ms without power is needed.
+			max77620_regulator_enable(REGULATOR_LDO2, 0);
+			msleep(100); // Some extra.
 		}
 
 		_sdmmc_get_clkcon(sdmmc);
@@ -1158,7 +1145,7 @@ int sdmmc_enable_low_voltage(sdmmc_t *sdmmc)
 	_sdmmc_get_clkcon(sdmmc);
 
 	max77620_regulator_set_voltage(REGULATOR_LDO2, 1800000);
-	PMC(APBDEV_PMC_PWR_DET_VAL) &= ~(1 << 12);
+	smcReadWriteRegister(PMC_BASE + APBDEV_PMC_PWR_DET_VAL, ~(1 << 12), (1 << 12));
 
 	_sdmmc_autocal_config_offset(sdmmc, SDMMC_POWER_1_8);
 	_sdmmc_autocal_execute(sdmmc, SDMMC_POWER_1_8);

emummc/source/emuMMC/emummc.c

@@ -92,15 +92,6 @@ static void _sdmmc_ensure_initialized(void)
     }
 }
 
-void sdmmc_finalize(void)
-{
-    if (!sdmmc_storage_end(&sd_storage))
-    {
-        fatal_abort(Fatal_InitSD);
-    }
-    storageSDinitialized = false;
-}
-
 static void _file_based_update_filename(char *outFilename, u32 sd_path_len, u32 part_idx)
 {
     snprintf(outFilename + sd_path_len, 3, "%02d", part_idx);
@@ -126,6 +117,18 @@ static void _file_based_emmc_finalize(void)
     }
 }
 
+void sdmmc_finalize(void)
+{
+    _file_based_emmc_finalize();
+
+    if (!sdmmc_storage_end(&sd_storage))
+    {
+        fatal_abort(Fatal_InitSD);
+    }
+
+    storageSDinitialized = false;
+}
+
 static void _file_based_emmc_initialize(void)
 {
     char path[sizeof(emuMMC_ctx.storagePath) + 0x20];
@@ -247,14 +250,20 @@ sdmmc_accessor_t *sdmmc_accessor_get(int mmc_id)
 
 void mutex_lock_handler(int mmc_id)
 {
-    lock_mutex(sd_mutex);
+    if (custom_driver)
+    {
+        lock_mutex(sd_mutex);
+    }
     lock_mutex(nand_mutex);
 }
 
 void mutex_unlock_handler(int mmc_id)
 {
     unlock_mutex(nand_mutex);
-    unlock_mutex(sd_mutex);
+    if (custom_driver)
+    {
+        unlock_mutex(sd_mutex);
+    }
 }
 
 int sdmmc_nand_get_active_partition_index()
@@ -320,16 +329,38 @@ static uint64_t emummc_read_write_inner(void *buf, unsigned int sector, unsigned
     else
         res = !(f_write(fp_tmp, buf, num_sectors << 9, NULL));
 
-    if (res)
+    return res;
+}
+
+// Controller close wrapper
+uint64_t sdmmc_wrapper_controller_close(int mmc_id)
+{
+    sdmmc_accessor_t *_this;
+    _this = sdmmc_accessor_get(mmc_id);
+
+    if (_this != NULL)
     {
-        if (is_write)
+        if (mmc_id == FS_SDMMC_SD)
         {
-            // TODO
+            return 0;
-            f_sync(fp_tmp);
         }
+        
+        if (mmc_id == FS_SDMMC_EMMC)
+        {
+            // Close file handles and unmount
+            _file_based_emmc_finalize();
+
+            // Close SD
+            sdmmc_accessor_get(FS_SDMMC_SD)->vtab->sdmmc_accessor_controller_close(sdmmc_accessor_get(FS_SDMMC_SD));
+
+            // Close eMMC
+            return _this->vtab->sdmmc_accessor_controller_close(_this);
+        }
+
+        return _this->vtab->sdmmc_accessor_controller_close(_this);
     }
 
-    return res;
+    fatal_abort(Fatal_CloseAccessor);
 }
 
 // FS read wrapper.
@@ -368,6 +399,18 @@ uint64_t sdmmc_wrapper_read(void *buf, uint64_t bufSize, int mmc_id, unsigned in
 
         if (mmc_id == FS_SDMMC_SD)
         {
+            static bool first_sd_read = true;
+            if (first_sd_read)
+            {
+                first_sd_read = false;
+                // Because some SD cards have issues with emuMMC's driver
+                // we currently swap to FS's driver after first SD read
+                // TODO: Fix remaining driver issues
+                custom_driver = false;
+                // FS will handle sd mutex w/o custom driver from here on
+                unlock_mutex(sd_mutex);
+            }
+
             // Call hekates driver.
             if (sdmmc_storage_read(&sd_storage, sector, num_sectors, buf))
             {

emummc/source/emuMMC/emummc.h

@@ -50,6 +50,8 @@ sdmmc_accessor_t *sdmmc_accessor_get(int mmc_id);
 void mutex_lock_handler(int mmc_id);
 void mutex_unlock_handler(int mmc_id);
 
+// Hooks
+uint64_t sdmmc_wrapper_controller_close(int mmc_id);
 uint64_t sdmmc_wrapper_read(void *buf, uint64_t bufSize, int mmc_id, unsigned int sector, unsigned int num_sectors);
 uint64_t sdmmc_wrapper_write(int mmc_id, unsigned int sector, unsigned int num_sectors, void *buf, uint64_t bufSize);
 

emummc/source/main.c

@@ -22,6 +22,8 @@
 #include <string.h>
 #include "nx/svc.h"
 #include "nx/smc.h"
+#include "soc/clock.h"
+#include "soc/i2c.h"
 #include "emuMMC/emummc.h"
 #include "emuMMC/emummc_ctx.h"
 #include "FS/FS_offsets.h"
@@ -174,6 +176,8 @@ void setup_hooks(void)
     INJECT_HOOK(fs_offsets->sdmmc_wrapper_read, sdmmc_wrapper_read);
     // sdmmc_wrapper_write hook
     INJECT_HOOK(fs_offsets->sdmmc_wrapper_write, sdmmc_wrapper_write);
+    // sdmmc_wrapper_controller_close hook
+    INJECT_HOOK(fs_offsets->sdmmc_accessor_controller_close, sdmmc_wrapper_controller_close);
 
     // On 8.0.0+, we need to hook the regulator setup, because
     // otherwise it will abort because we have already turned it on.
@@ -203,10 +207,6 @@ void populate_function_pointers(void)
 
 void write_nops(void)
 {
-    // This NOPs out a call to ShutdownSdCard when preparing for shutdown/reboot.
-    // This prevents the PatrolReader from hanging when saving its state, which
-    // occurs immediately afterwards (in ShutdownMmc).
-    INJECT_NOP(fs_offsets->shutdown_sd);
     // On 7.0.0+, we need to attach to device address space ourselves.
     // This patches an abort that happens when Nintendo's code sees SD
     // is already attached
@@ -316,4 +316,7 @@ void __init()
     populate_function_pointers();
     write_nops();
     setup_nintendo_paths();
+
+    clock_enable_i2c5();
+    i2c_init();
 }

emummc/source/soc/i2c.c

@@ -20,7 +20,8 @@
 #include "../utils/util.h"
 #include "t210.h"
 
-static u32 i2c_addrs[] = {
+// TODO: not hardcode I2C_5
+static u64 i2c_addrs[] = {
 	0x7000C000, 0x7000C400, 0x7000C500,
 	0x7000C700, 0x7000D000, 0x7000D100
 };
@@ -28,6 +29,7 @@ static u32 i2c_addrs[] = {
 static void _i2c_wait(vu32 *base)
 {
 	base[I2C_CONFIG_LOAD] = 0x25;
+
 	for (u32 i = 0; i < 20; i++)
 	{
 		usleep(1);
@@ -44,8 +46,7 @@ static int _i2c_send_pkt(u32 idx, u32 x, u8 *buf, u32 size)
 	u32 tmp = 0;
 	memcpy(&tmp, buf, size);
 
-	vu32 *base = (vu32 *)QueryIoMapping(i2c_addrs[0], 0x2000);
+	vu32 *base = (vu32 *)QueryIoMapping(i2c_addrs[I2C_5], 0x1000);
-    base = base + (i2c_addrs[idx] - i2c_addrs[0]);
 	base[I2C_CMD_ADDR0] = x << 1; //Set x (send mode).
 	base[I2C_CMD_DATA1] = tmp;    //Set value.
 	base[I2C_CNFG] = (2 * size - 2) | 0x2800; //Set size and send mode.
@@ -66,8 +67,7 @@ static int _i2c_recv_pkt(u32 idx, u8 *buf, u32 size, u32 x)
 	if (size > 8)
 		return 0;
 
-	vu32 *base = (vu32 *)QueryIoMapping(i2c_addrs[0], 0x2000);
+	vu32 *base = (vu32 *)QueryIoMapping(i2c_addrs[I2C_5], 0x1000);
-    base = base + (i2c_addrs[idx] - i2c_addrs[0]);
 
 	base[I2C_CMD_ADDR0] = (x << 1) | 1; // Set x (recv mode).
 	base[I2C_CNFG] = (size - 1) << 1 | 0x2840; // Set size and recv mode.
@@ -93,10 +93,9 @@ static int _i2c_recv_pkt(u32 idx, u8 *buf, u32 size, u32 x)
 	return 1;
 }
 
-void i2c_init(u32 idx)
+void i2c_init()
 {
-	vu32 *base = (vu32 *)QueryIoMapping(i2c_addrs[0], 0x2000);
+	vu32 *base = (vu32 *)QueryIoMapping(i2c_addrs[I2C_5], 0x1000);
-    base = base + (i2c_addrs[idx] - i2c_addrs[0]);
     
 	base[I2C_CLK_DIVISOR_REGISTER] = 0x50001;
 	base[I2C_BUS_CLEAR_CONFIG] = 0x90003;
@@ -104,7 +103,6 @@ void i2c_init(u32 idx)
 
 	for (u32 i = 0; i < 10; i++)
 	{
-		usleep(20000);
 		if (base[INTERRUPT_STATUS_REGISTER] & 0x800)
 			break;
 	}

emummc/source/soc/i2c.h

@@ -37,7 +37,7 @@
 #define I2C_BUS_CLEAR_STATUS 0x22
 #define I2C_CONFIG_LOAD 0x23
 
-void i2c_init(u32 idx);
+void i2c_init();
 int i2c_send_buf_small(u32 idx, u32 x, u32 y, u8 *buf, u32 size);
 int i2c_recv_buf_small(u8 *buf, u32 size, u32 idx, u32 x, u32 y);
 int i2c_send_byte(u32 idx, u32 x, u32 y, u8 b);

emummc/source/utils/fatal.h

@@ -28,6 +28,7 @@ enum FatalReason {
     Fatal_UnknownVersion,
     Fatal_BadResult,
     Fatal_GetConfig,
+    Fatal_CloseAccessor,
     Fatal_Max
 };