mirror of
https://github.com/Atmosphere-NX/Atmosphere
synced 2024-12-31 17:31:15 +00:00
warmboot: start secmon_restore_to_tzram
This commit is contained in:
Michael Scire
parent
4f9ecc9d50
commit
3924a2ef76
5 changed files with 520 additions and 3 deletions
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@ -25,6 +25,7 @@
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#include "cluster.h"
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#include "flow.h"
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#include "timer.h"
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#include "secmon.h"
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void reboot(void) {
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/* Write MAIN_RST */
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@ -81,7 +82,7 @@ void lp0_entry_main(warmboot_metadata_t *meta) {
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/* Initialize the CPU cluster. */
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cluster_initialize_cpu();
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/* TODO: decrypt_restore_secmon_to_tzram(); */
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secmon_restore_to_tzram(target_firmware);
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/* Power on the CPU cluster. */
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cluster_power_on_cpu();
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@ -95,5 +96,3 @@ void lp0_entry_main(warmboot_metadata_t *meta) {
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FLOW_CTLR_HALT_COP_EVENTS_0 = halt_val;
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}
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}
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238
exosphere/lp0fw/src/se.c
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238
exosphere/lp0fw/src/se.c
Normal file
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@ -0,0 +1,238 @@
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/*
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* Copyright (c) 2018 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <string.h>
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#include "utils.h"
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#include "lp0.h"
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#include "se.h"
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static void trigger_se_blocking_op(unsigned int op, void *dst, size_t dst_size, const void *src, size_t src_size);
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/* Initialize a SE linked list. */
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static void __attribute__((__noinline__)) ll_init(volatile se_ll_t *ll, void *buffer, size_t size) {
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ll->num_entries = 0; /* 1 Entry. */
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if (buffer != NULL) {
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ll->addr_info.address = (uint32_t) buffer;
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ll->addr_info.size = (uint32_t) size;
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} else {
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ll->addr_info.address = 0;
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ll->addr_info.size = 0;
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}
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}
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void se_check_error_status_reg(void) {
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if (se_get_regs()->ERR_STATUS_REG) {
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reboot();
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}
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}
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void se_check_for_error(void) {
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volatile tegra_se_t *se = se_get_regs();
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if (se->INT_STATUS_REG & 0x10000 || se->FLAGS_REG & 3 || se->ERR_STATUS_REG) {
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reboot();
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}
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}
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void se_verify_flags_cleared(void) {
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if (se_get_regs()->FLAGS_REG & 3) {
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reboot();
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}
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}
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void clear_aes_keyslot(unsigned int keyslot) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_AES_MAX) {
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reboot();
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}
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/* Zero out the whole keyslot and IV. */
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for (unsigned int i = 0; i < 0x10; i++) {
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se->AES_KEYTABLE_ADDR = (keyslot << 4) | i;
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se->AES_KEYTABLE_DATA = 0;
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}
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}
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void clear_rsa_keyslot(unsigned int keyslot) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_RSA_MAX) {
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reboot();
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}
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/* Zero out the whole keyslot. */
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for (unsigned int i = 0; i < 0x40; i++) {
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/* Select Keyslot Modulus[i] */
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se->RSA_KEYTABLE_ADDR = (keyslot << 7) | i | 0x40;
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se->RSA_KEYTABLE_DATA = 0;
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}
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for (unsigned int i = 0; i < 0x40; i++) {
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/* Select Keyslot Expontent[i] */
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se->RSA_KEYTABLE_ADDR = (keyslot << 7) | i;
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se->RSA_KEYTABLE_DATA = 0;
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}
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}
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void clear_aes_keyslot_iv(unsigned int keyslot) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_AES_MAX) {
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reboot();
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}
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for (size_t i = 0; i < (0x10 >> 2); i++) {
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se->AES_KEYTABLE_ADDR = (keyslot << 4) | 8 | i;
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se->AES_KEYTABLE_DATA = 0;
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}
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}
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void trigger_se_blocking_op(unsigned int op, void *dst, size_t dst_size, const void *src, size_t src_size) {
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volatile tegra_se_t *se = se_get_regs();
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se_ll_t in_ll;
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se_ll_t out_ll;
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ll_init(&in_ll, (void *)src, src_size);
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ll_init(&out_ll, dst, dst_size);
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/* Set the LLs. */
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se->IN_LL_ADDR_REG = (uint32_t)(&in_ll);
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se->OUT_LL_ADDR_REG = (uint32_t) (&out_ll);
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/* Set registers for operation. */
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se->ERR_STATUS_REG = se->ERR_STATUS_REG;
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se->INT_STATUS_REG = se->INT_STATUS_REG;
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se->OPERATION_REG = op;
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while (!(se->INT_STATUS_REG & 0x10)) { /* Wait a while */ }
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se_check_for_error();
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}
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/* Secure AES Functionality. */
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void se_perform_aes_block_operation(void *dst, size_t dst_size, const void *src, size_t src_size) {
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uint8_t block[0x10] = {0};
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if (src_size > sizeof(block) || dst_size > sizeof(block)) {
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reboot();
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}
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/* Load src data into block. */
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if (src_size != 0) {
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memcpy(block, src, src_size);
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}
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/* Trigger AES operation. */
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se_get_regs()->BLOCK_COUNT_REG = 0;
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trigger_se_blocking_op(OP_START, block, sizeof(block), block, sizeof(block));
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/* Copy output data into dst. */
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if (dst_size != 0) {
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memcpy(dst, block, dst_size);
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}
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}
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void se_aes_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, unsigned int config_high) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_AES_MAX || dst_size != 0x10 || src_size != 0x10) {
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reboot();
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}
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/* Set configuration high (256-bit vs 128-bit) based on parameter. */
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se->CONFIG_REG = (ALG_AES_ENC | DST_MEMORY) | (config_high << 16);
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se->CRYPTO_REG = keyslot << 24 | 0x100;
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se_perform_aes_block_operation(dst, 0x10, src, 0x10);
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}
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void se_aes_ecb_decrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_AES_MAX || dst_size != 0x10 || src_size != 0x10) {
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reboot();
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}
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se->CONFIG_REG = (ALG_AES_DEC | DST_MEMORY);
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se->CRYPTO_REG = keyslot << 24;
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se_perform_aes_block_operation(dst, 0x10, src, 0x10);
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}
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void shift_left_xor_rb(uint8_t *key) {
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uint8_t prev_high_bit = 0;
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for (unsigned int i = 0; i < 0x10; i++) {
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uint8_t cur_byte = key[0xF - i];
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key[0xF - i] = (cur_byte << 1) | (prev_high_bit);
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prev_high_bit = cur_byte >> 7;
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}
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if (prev_high_bit) {
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key[0xF] ^= 0x87;
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}
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}
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void se_compute_aes_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size, unsigned int config_high) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_AES_MAX) {
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reboot();
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}
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/* Generate the derived key, to be XOR'd with final output block. */
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uint8_t ALIGN(16) derived_key[0x10] = {0};
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se_aes_ecb_encrypt_block(keyslot, derived_key, sizeof(derived_key), derived_key, sizeof(derived_key), config_high);
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shift_left_xor_rb(derived_key);
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if (data_size & 0xF) {
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shift_left_xor_rb(derived_key);
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}
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se->CONFIG_REG = (ALG_AES_ENC | DST_HASHREG) | (config_high << 16);
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se->CRYPTO_REG = (keyslot << 24) | (0x145);
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clear_aes_keyslot_iv(keyslot);
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unsigned int num_blocks = (data_size + 0xF) >> 4;
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/* Handle aligned blocks. */
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if (num_blocks > 1) {
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se->BLOCK_COUNT_REG = num_blocks - 2;
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trigger_se_blocking_op(OP_START, NULL, 0, data, data_size);
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se->CRYPTO_REG |= 0x80;
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}
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/* Create final block. */
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uint8_t ALIGN(16) last_block[0x10] = {0};
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if (data_size & 0xF) {
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memcpy(last_block, data + (data_size & ~0xF), data_size & 0xF);
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last_block[data_size & 0xF] = 0x80; /* Last block = data || 100...0 */
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} else if (data_size >= 0x10) {
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memcpy(last_block, data + data_size - 0x10, 0x10);
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}
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for (unsigned int i = 0; i < 0x10; i++) {
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last_block[i] ^= derived_key[i];
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}
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/* Perform last operation. */
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se->BLOCK_COUNT_REG = 0;
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trigger_se_blocking_op(OP_START, NULL, 0, last_block, sizeof(last_block));
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/* Copy output CMAC. */
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for (unsigned int i = 0; i < (cmac_size >> 2); i++) {
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((uint32_t *)cmac)[i] = ((volatile uint32_t *)se->HASH_RESULT_REG)[i];
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}
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}
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void se_compute_aes_256_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size) {
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se_compute_aes_cmac(keyslot, cmac, cmac_size, data, data_size, 0x202);
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}
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187
exosphere/lp0fw/src/se.h
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187
exosphere/lp0fw/src/se.h
Normal file
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@ -0,0 +1,187 @@
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/*
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* Copyright (c) 2018 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef EXOSPHERE_WARMBOOT_BIN_SE_H
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#define EXOSPHERE_WARMBOOT_BIN_SE_H
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#define SE_BASE 0x70012000
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#define MAKE_SE_REG(n) MAKE_REG32(SE_BASE + n)
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#define KEYSLOT_SWITCH_LP0TZRAMKEY 0x2
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#define KEYSLOT_SWITCH_SRKGENKEY 0x8
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#define KEYSLOT_SWITCH_PACKAGE2KEY 0x8
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#define KEYSLOT_SWITCH_TEMPKEY 0x9
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#define KEYSLOT_SWITCH_SESSIONKEY 0xA
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#define KEYSLOT_SWITCH_RNGKEY 0xB
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#define KEYSLOT_SWITCH_MASTERKEY 0xC
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#define KEYSLOT_SWITCH_DEVICEKEY 0xD
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/* This keyslot was added in 4.0.0. */
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#define KEYSLOT_SWITCH_4XNEWDEVICEKEYGENKEY 0xD
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#define KEYSLOT_SWITCH_4XNEWCONSOLEKEYGENKEY 0xE
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#define KEYSLOT_SWITCH_4XOLDDEVICEKEY 0xF
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/* This keyslot was added in 5.0.0. */
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#define KEYSLOT_SWITCH_5XNEWDEVICEKEYGENKEY 0xA
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#define KEYSLOT_AES_MAX 0x10
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#define KEYSLOT_RSA_MAX 0x2
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#define KEYSIZE_AES_MAX 0x20
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#define KEYSIZE_RSA_MAX 0x100
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#define ALG_SHIFT (12)
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#define ALG_DEC_SHIFT (8)
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#define ALG_NOP (0 << ALG_SHIFT)
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#define ALG_AES_ENC (1 << ALG_SHIFT)
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#define ALG_AES_DEC ((1 << ALG_DEC_SHIFT) | ALG_NOP)
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#define ALG_RNG (2 << ALG_SHIFT)
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#define ALG_SHA (3 << ALG_SHIFT)
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#define ALG_RSA (4 << ALG_SHIFT)
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#define DST_SHIFT (2)
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#define DST_MEMORY (0 << DST_SHIFT)
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#define DST_HASHREG (1 << DST_SHIFT)
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#define DST_KEYTAB (2 << DST_SHIFT)
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#define DST_SRK (3 << DST_SHIFT)
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#define DST_RSAREG (4 << DST_SHIFT)
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#define ENCMODE_SHIFT (24)
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#define DECMODE_SHIFT (16)
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#define ENCMODE_SHA256 (5 << ENCMODE_SHIFT)
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#define HASH_DISABLE (0x0)
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#define HASH_ENABLE (0x1)
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#define OP_ABORT 0
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#define OP_START 1
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#define OP_RESTART 2
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#define OP_CTX_SAVE 3
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#define OP_RESTART_IN 4
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#define CTX_SAVE_SRC_SHIFT 29
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#define CTX_SAVE_SRC_STICKY_BITS (0 << CTX_SAVE_SRC_SHIFT)
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#define CTX_SAVE_SRC_KEYTABLE_AES (2 << CTX_SAVE_SRC_SHIFT)
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#define CTX_SAVE_SRC_KEYTABLE_RSA (1 << CTX_SAVE_SRC_SHIFT)
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#define CTX_SAVE_SRC_MEM (4 << CTX_SAVE_SRC_SHIFT)
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#define CTX_SAVE_SRC_SRK (6 << CTX_SAVE_SRC_SHIFT)
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#define CTX_SAVE_KEY_LOW_BITS 0
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#define CTX_SAVE_KEY_HIGH_BITS 1
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#define CTX_SAVE_KEY_ORIGINAL_IV 2
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#define CTX_SAVE_KEY_UPDATED_IV 3
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#define CTX_SAVE_STICKY_BIT_INDEX_SHIFT 24
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#define CTX_SAVE_KEY_INDEX_SHIFT 8
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#define CTX_SAVE_RSA_KEY_INDEX_SHIFT 16
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#define CTX_SAVE_RSA_KEY_BLOCK_INDEX_SHIFT 12
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#define RSA_2048_BYTES 0x100
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typedef struct {
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uint32_t _0x0;
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uint32_t _0x4;
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uint32_t OPERATION_REG;
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uint32_t INT_ENABLE_REG;
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uint32_t INT_STATUS_REG;
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uint32_t CONFIG_REG;
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uint32_t IN_LL_ADDR_REG;
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uint32_t _0x1C;
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uint32_t _0x20;
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uint32_t OUT_LL_ADDR_REG;
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uint32_t _0x28;
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uint32_t _0x2C;
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uint8_t HASH_RESULT_REG[0x20];
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uint8_t _0x50[0x20];
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uint32_t CONTEXT_SAVE_CONFIG_REG;
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uint8_t _0x74[0x18C];
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uint32_t SHA_CONFIG_REG;
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uint32_t SHA_MSG_LENGTH_REG;
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uint32_t _0x208;
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uint32_t _0x20C;
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uint32_t _0x210;
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uint32_t SHA_MSG_LEFT_REG;
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uint32_t _0x218;
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uint32_t _0x21C;
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uint32_t _0x220;
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uint32_t _0x224;
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uint8_t _0x228[0x58];
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uint32_t AES_KEY_READ_DISABLE_REG;
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uint32_t AES_KEYSLOT_FLAGS[0x10];
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uint8_t _0x2C4[0x3C];
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uint32_t _0x300;
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uint32_t CRYPTO_REG;
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uint32_t CRYPTO_CTR_REG[4];
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uint32_t BLOCK_COUNT_REG;
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uint32_t AES_KEYTABLE_ADDR;
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uint32_t AES_KEYTABLE_DATA;
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uint32_t _0x324;
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uint32_t _0x328;
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uint32_t _0x32C;
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uint32_t CRYPTO_KEYTABLE_DST_REG;
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uint8_t _0x334[0xC];
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uint32_t RNG_CONFIG_REG;
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uint32_t RNG_SRC_CONFIG_REG;
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uint32_t RNG_RESEED_INTERVAL_REG;
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uint8_t _0x34C[0xB4];
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uint32_t RSA_CONFIG;
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uint32_t RSA_KEY_SIZE_REG;
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uint32_t RSA_EXP_SIZE_REG;
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uint32_t RSA_KEY_READ_DISABLE_REG;
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uint32_t RSA_KEYSLOT_FLAGS[2];
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uint32_t _0x418;
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uint32_t _0x41C;
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uint32_t RSA_KEYTABLE_ADDR;
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uint32_t RSA_KEYTABLE_DATA;
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uint8_t RSA_OUTPUT[0x100];
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uint8_t _0x528[0x2D8];
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uint32_t FLAGS_REG;
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uint32_t ERR_STATUS_REG;
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uint32_t _0x808;
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uint32_t SPARE_0;
|
||||
uint32_t _0x810;
|
||||
uint32_t _0x814;
|
||||
uint32_t _0x818;
|
||||
uint32_t _0x81C;
|
||||
uint8_t _0x820[0x17E0];
|
||||
} tegra_se_t;
|
||||
|
||||
typedef struct {
|
||||
uint32_t address;
|
||||
uint32_t size;
|
||||
} se_addr_info_t;
|
||||
|
||||
typedef struct {
|
||||
uint32_t num_entries; /* Set to total entries - 1 */
|
||||
se_addr_info_t addr_info; /* This should really be an array...but for our use case it works. */
|
||||
} se_ll_t;
|
||||
|
||||
static inline volatile tegra_se_t *se_get_regs(void) {
|
||||
return (volatile tegra_se_t *)SE_BASE;
|
||||
}
|
||||
|
||||
void se_check_error_status_reg(void);
|
||||
void se_check_for_error(void);
|
||||
|
||||
void se_verify_flags_cleared(void);
|
||||
|
||||
void clear_aes_keyslot(unsigned int keyslot);
|
||||
void clear_rsa_keyslot(unsigned int keyslot);
|
||||
void clear_aes_keyslot_iv(unsigned int keyslot);
|
||||
|
||||
void se_compute_aes_256_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size);
|
||||
|
||||
#endif
|
||||
67
exosphere/lp0fw/src/secmon.c
Normal file
67
exosphere/lp0fw/src/secmon.c
Normal file
|
|
@ -0,0 +1,67 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Atmosphère-NX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include "utils.h"
|
||||
#include "lp0.h"
|
||||
#include "secmon.h"
|
||||
#include "se.h"
|
||||
#include "pmc.h"
|
||||
|
||||
/* "private" functions. */
|
||||
static bool secmon_should_clear_aes_keyslot(unsigned int keyslot);
|
||||
static void secmon_clear_unused_keyslots(void);
|
||||
|
||||
void secmon_restore_to_tzram(const uint32_t target_firmware) {
|
||||
/* Newer warmboot binaries clear the untouched keyslots for safety. */
|
||||
if (target_firmware >= ATMOSPHERE_TARGET_FIRMWARE_500) {
|
||||
secmon_clear_unused_keyslots();
|
||||
}
|
||||
|
||||
/* TODO: stuff */
|
||||
}
|
||||
|
||||
bool secmon_should_clear_aes_keyslot(unsigned int keyslot) {
|
||||
static const uint8_t saved_keyslots[6] = {
|
||||
KEYSLOT_SWITCH_LP0TZRAMKEY,
|
||||
KEYSLOT_SWITCH_SESSIONKEY,
|
||||
KEYSLOT_SWITCH_RNGKEY,
|
||||
KEYSLOT_SWITCH_MASTERKEY,
|
||||
KEYSLOT_SWITCH_DEVICEKEY,
|
||||
KEYSLOT_SWITCH_4XOLDDEVICEKEY
|
||||
};
|
||||
|
||||
for (unsigned int i = 0; i < sizeof(saved_keyslots)/sizeof(saved_keyslots[0]); i++) {
|
||||
if (keyslot == saved_keyslots[i]) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
void secmon_clear_unused_keyslots(void) {
|
||||
/* Clear unused keyslots. */
|
||||
for (unsigned int i = 0; i < KEYSLOT_AES_MAX; i++) {
|
||||
if (secmon_should_clear_aes_keyslot(i)) {
|
||||
clear_aes_keyslot(i);
|
||||
}
|
||||
clear_aes_keyslot_iv(i);
|
||||
}
|
||||
for (unsigned int i = 0; i < KEYSLOT_RSA_MAX; i++) {
|
||||
clear_rsa_keyslot(i);
|
||||
}
|
||||
}
|
||||
26
exosphere/lp0fw/src/secmon.h
Normal file
26
exosphere/lp0fw/src/secmon.h
Normal file
|
|
@ -0,0 +1,26 @@
|
|||
/*
|
||||
* Copyright (c) 2018 Atmosphère-NX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef EXOSPHERE_WARMBOOT_BIN_SECMON_H
|
||||
#define EXOSPHERE_WARMBOOT_BIN_SECMON_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include "utils.h"
|
||||
|
||||
void secmon_restore_to_tzram(const uint32_t target_firmware);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in a new issue