From 303e189559877c4abfacb8833f7806ad11b1d148 Mon Sep 17 00:00:00 2001
From: Michael Scire <SciresM@gmail.com>
Date: Thu, 1 Mar 2018 23:33:43 -0800
Subject: [PATCH] Implement a few TODOs with CAR driver.

---
 exosphere/src/car.h  |  3 +++
 exosphere/src/fuse.c |  6 ++----
 exosphere/src/lp0.c  | 25 ++++++++++++++++---------
 3 files changed, 21 insertions(+), 13 deletions(-)

diff --git a/exosphere/src/car.h b/exosphere/src/car.h
index f38d35717..34fbef8da 100644
--- a/exosphere/src/car.h
+++ b/exosphere/src/car.h
@@ -11,6 +11,9 @@
 
 #define MAKE_CAR_REG(n) (*((volatile uint32_t *)(CAR_BASE + n)))
 
+#define CLK_RST_CONTROLLER_MISC_CLK_ENB_0 MAKE_CAR_REG(0x048)
+#define CLK_RST_CONTROLLER_RST_DEVICES_H_0 MAKE_CAR_REG(0x008)
+
 #define NUM_CAR_BANKS 7
 
 typedef enum {
diff --git a/exosphere/src/fuse.c b/exosphere/src/fuse.c
index 87099adb2..de65e4847 100644
--- a/exosphere/src/fuse.c
+++ b/exosphere/src/fuse.c
@@ -1,5 +1,6 @@
 #include <string.h>
 
+#include "car.h"
 #include "fuse.h"
 #include "utils.h"
 #include "timers.h"
@@ -22,10 +23,7 @@ void fuse_init(void)
 /* Make all fuse registers visible */
 void fuse_make_regs_visible(void)
 {
-    /* TODO: Replace this with a proper CLKRST driver */
-    volatile uint32_t* misc_clk_reg = (volatile uint32_t *)MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_CLKRST) + 0x48;
-    uint32_t misc_clk_val = *misc_clk_reg;
-    *misc_clk_reg = (misc_clk_val | (1 << 28));
+    CLK_RST_CONTROLLER_MISC_CLK_ENB_0 |= BIT(28);
 }
 
 /* Enable power to the fuse hardware array */
diff --git a/exosphere/src/lp0.c b/exosphere/src/lp0.c
index 47c0b26d9..abaa8666a 100644
--- a/exosphere/src/lp0.c
+++ b/exosphere/src/lp0.c
@@ -4,6 +4,7 @@
 
 #include "utils.h"
 
+#include "car.h"
 #include "bpmp.h"
 #include "arm.h"
 #include "configitem.h"
@@ -81,7 +82,7 @@ uint32_t cpu_suspend(uint64_t power_state, uint64_t entrypoint, uint64_t argumen
     
     unsigned int current_core = get_core_id();
     
-    /* TODO: Enable clock and reset for I2C1. */
+    clkrst_reboot(CARDEVICE_I2C1);
     if (configitem_should_profile_battery() && !i2c_query_ti_charger_bit_7()) {
         /* Profile the battery. */
         i2c_set_ti_charger_bit_7();
@@ -98,7 +99,7 @@ uint32_t cpu_suspend(uint64_t power_state, uint64_t entrypoint, uint64_t argumen
             wait(0x100);
         }
     }
-    /* TODO: Reset I2C1 controller. */
+    clkrst_disable(CARDEVICE_I2C1);
     
     /* Enable LP0 Wake Event Detection. */
     wait(75);
@@ -108,7 +109,7 @@ uint32_t cpu_suspend(uint64_t power_state, uint64_t entrypoint, uint64_t argumen
     APBDEV_PMC_WAKE2_STATUS_0 = 0xFFFFFFFF; /* Set all wake events. */
     wait(75);
     
-    /* TODO: Enable I2C5 Clock/Reset. */
+    clkrst_reboot(CARDEVICE_I2C5);
     if (fuse_get_bootrom_patch_version() >= 0x7F) {
         i2c_send_pmic_cpu_shutdown_cmd();
     }
@@ -131,8 +132,10 @@ uint32_t cpu_suspend(uint64_t power_state, uint64_t entrypoint, uint64_t argumen
         }
     }
     
-    /* TODO: Jamais Vu mitigation #3: Ensure all relevant DMA controllers are held in reset. */
-    /* This just requires checking CLK_RST_CONTROLLER_RST_DEVICES_H_0 & mask == 0x4000004. */
+    /* Jamais Vu mitigation #3: Ensure all relevant DMA controllers are held in reset. */
+    if ((CLK_RST_CONTROLLER_RST_DEVICES_H_0 & 0x4000004) != 0x4000004) {
+        generic_panic();
+    }
     
     /* Signal to bootrom the next reset should be a warmboot. */
     APBDEV_PMC_SCRATCH0_0 = 1; 
@@ -153,11 +156,16 @@ uint32_t cpu_suspend(uint64_t power_state, uint64_t entrypoint, uint64_t argumen
     BPMP_VECTOR_IRQ = 0x40003004; /* Reboot. */
     BPMP_VECTOR_FIQ = 0x40003004; /* Reboot. */
     
-    /* TODO: Hold the BPMP in reset. */
+    /* Hold the BPMP in reset. */
+    clkrst_disable(CARDEVICE_BPMP);
+
+    /* Copy BPMP firmware. */
     uint8_t *lp0_entry_code = (uint8_t *)(LP0_ENTRY_GET_RAM_SEGMENT_ADDRESS(LP0_ENTRY_RAM_SEGMENT_ID_LP0_ENTRY_CODE));
     memcpy(lp0_entry_code, bpmpfw_bin, bpmpfw_bin_size);
     flush_dcache_range(lp0_entry_code, lp0_entry_code + bpmpfw_bin_size);
-    /* TODO: Take the BPMP out of reset. */
+
+    /* Take the BPMP out of reset. */
+    clkrst_enable(CARDEVICE_BPMP);
     
     /* Start executing BPMP firmware. */
     FLOW_CTLR_HALT_COP_EVENTS_0 = 0;
@@ -173,6 +181,5 @@ uint32_t cpu_suspend(uint64_t power_state, uint64_t entrypoint, uint64_t argumen
     set_current_core_inactive(); 
     call_with_stack_pointer(get_smc_core012_stack_address(), save_se_and_power_down_cpu);
     
-    /* NOTE: This return never actually occurs. */
-    return 0;
+    generic_panic();
 }