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warmboot: add car_configure_oscillators
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a94bee71d2
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0b15539479
4 changed files with 23 additions and 0 deletions
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@ -19,6 +19,7 @@
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#include "utils.h"
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#include "utils.h"
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#include "car.h"
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#include "car.h"
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#include "timer.h"
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#include "timer.h"
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#include "pmc.h"
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#include "lp0.h"
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#include "lp0.h"
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static inline uint32_t get_special_clk_reg(CarDevice dev) {
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static inline uint32_t get_special_clk_reg(CarDevice dev) {
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@ -48,6 +49,20 @@ static inline uint32_t get_special_clk_val(CarDevice dev) {
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static uint32_t g_clk_reg_offsets[NUM_CAR_BANKS] = {0x010, 0x014, 0x018, 0x360, 0x364, 0x280, 0x298};
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static uint32_t g_clk_reg_offsets[NUM_CAR_BANKS] = {0x010, 0x014, 0x018, 0x360, 0x364, 0x280, 0x298};
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static uint32_t g_rst_reg_offsets[NUM_CAR_BANKS] = {0x004, 0x008, 0x00C, 0x358, 0x35C, 0x28C, 0x2A4};
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static uint32_t g_rst_reg_offsets[NUM_CAR_BANKS] = {0x004, 0x008, 0x00C, 0x358, 0x35C, 0x28C, 0x2A4};
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void car_configure_oscillators(void) {
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/* Enable the crystal oscillator, setting drive strength to the saved value in PMC. */
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CLK_RST_CONTROLLER_OSC_CTRL_0 = (CLK_RST_CONTROLLER_OSC_CTRL_0 & 0xFFFFFC0E) | 1 | (((APBDEV_PMC_OSC_EDPD_OVER_0 >> 1) & 0x3F) << 4);
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/* Set CLK_M_DIVISOR to 1 (causes actual division by 2.) */
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CLK_RST_CONTROLLER_SPARE_REG0_0 = (1 << 2);
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/* Reading the register after writing it is required to ensure value takes. */
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(void)(CLK_RST_CONTROLLER_SPARE_REG0_0);
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/* Set TIMERUS_USEC_CFG to cycle at 0x60 / 0x5 = 19.2 MHz. */
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/* Value is (dividend << 8) | (divisor). */
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TIMERUS_USEC_CFG_0 = 0x45F;
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}
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void clk_enable(CarDevice dev) {
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void clk_enable(CarDevice dev) {
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uint32_t special_reg;
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uint32_t special_reg;
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if ((special_reg = get_special_clk_reg(dev))) {
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if ((special_reg = get_special_clk_reg(dev))) {
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@ -24,11 +24,14 @@
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#define MAKE_CAR_REG(n) MAKE_REG32(CAR_BASE + n)
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#define MAKE_CAR_REG(n) MAKE_REG32(CAR_BASE + n)
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#define CLK_RST_CONTROLLER_MISC_CLK_ENB_0 MAKE_CAR_REG(0x048)
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#define CLK_RST_CONTROLLER_MISC_CLK_ENB_0 MAKE_CAR_REG(0x048)
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#define CLK_RST_CONTROLLER_OSC_CTRL_0 MAKE_CAR_REG(0x050)
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#define CLK_RST_CONTROLLER_RST_DEVICES_H_0 MAKE_CAR_REG(0x008)
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#define CLK_RST_CONTROLLER_RST_DEVICES_H_0 MAKE_CAR_REG(0x008)
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#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD_0 MAKE_CAR_REG(0x3A4)
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#define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD_0 MAKE_CAR_REG(0x3A4)
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#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET_0 MAKE_CAR_REG(0x450)
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#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET_0 MAKE_CAR_REG(0x450)
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#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR_0 MAKE_CAR_REG(0x454)
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#define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR_0 MAKE_CAR_REG(0x454)
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#define CLK_RST_CONTROLLER_SPARE_REG0_0 MAKE_CAR_REG(0x55C)
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#define NUM_CAR_BANKS 7
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#define NUM_CAR_BANKS 7
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typedef enum {
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typedef enum {
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@ -40,6 +43,8 @@ typedef enum {
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CARDEVICE_BPMP = 1
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CARDEVICE_BPMP = 1
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} CarDevice;
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} CarDevice;
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void car_configure_oscillators(void);
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void clk_enable(CarDevice dev);
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void clk_enable(CarDevice dev);
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void clk_disable(CarDevice dev);
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void clk_disable(CarDevice dev);
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void rst_enable(CarDevice dev);
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void rst_enable(CarDevice dev);
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@ -37,6 +37,8 @@
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#define APBDEV_PMC_SCRATCH13_0 MAKE_PMC_REG(0x084)
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#define APBDEV_PMC_SCRATCH13_0 MAKE_PMC_REG(0x084)
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#define APBDEV_PMC_SCRATCH18_0 MAKE_PMC_REG(0x098)
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#define APBDEV_PMC_SCRATCH18_0 MAKE_PMC_REG(0x098)
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#define APBDEV_PMC_OSC_EDPD_OVER_0 MAKE_PMC_REG(0x1A4)
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#define APBDEV_PMC_STICKY_BITS_0 MAKE_PMC_REG(0x2C0)
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#define APBDEV_PMC_STICKY_BITS_0 MAKE_PMC_REG(0x2C0)
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#define APBDEV_PMC_SEC_DISABLE2_0 MAKE_PMC_REG(0x2C4)
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#define APBDEV_PMC_SEC_DISABLE2_0 MAKE_PMC_REG(0x2C4)
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#define APBDEV_PMC_WEAK_BIAS_0 MAKE_PMC_REG(0x2C8)
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#define APBDEV_PMC_WEAK_BIAS_0 MAKE_PMC_REG(0x2C8)
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@ -20,6 +20,7 @@
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#include "utils.h"
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#include "utils.h"
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#define TIMERUS_CNTR_1US_0 MAKE_REG32(0x60005010)
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#define TIMERUS_CNTR_1US_0 MAKE_REG32(0x60005010)
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#define TIMERUS_USEC_CFG_0 MAKE_REG32(0x60005014)
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static inline void timer_wait(uint32_t microseconds) {
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static inline void timer_wait(uint32_t microseconds) {
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uint32_t old_time = TIMERUS_CNTR_1US_0;
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uint32_t old_time = TIMERUS_CNTR_1US_0;
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