2019-05-02 12:57:10 +00:00
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/*
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* Copyright (c) 2018-2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <switch.h>
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#include <stratosphere.hpp>
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#include "i2c_bus_accessor.hpp"
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#include "boot_pcv.hpp"
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void I2cBusAccessor::Open(I2cBus bus, SpeedMode speed_mode) {
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std::scoped_lock<HosMutex> lk(this->open_mutex);
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/* Open new session. */
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this->open_sessions++;
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/* Ensure we're good if this isn't our first session. */
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if (this->open_sessions > 1) {
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if (this->speed_mode != speed_mode) {
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std::abort();
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}
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return;
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}
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/* Set all members for chosen bus. */
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{
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std::scoped_lock<HosMutex> lk(this->register_mutex);
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/* Set bus/registers. */
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this->SetBus(bus);
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/* Set pcv module. */
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switch (bus) {
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case I2cBus_I2c1:
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this->pcv_module = PcvModule_I2C1;
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break;
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case I2cBus_I2c2:
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this->pcv_module = PcvModule_I2C2;
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break;
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case I2cBus_I2c3:
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this->pcv_module = PcvModule_I2C3;
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break;
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case I2cBus_I2c4:
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this->pcv_module = PcvModule_I2C4;
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break;
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case I2cBus_I2c5:
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this->pcv_module = PcvModule_I2C5;
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break;
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case I2cBus_I2c6:
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this->pcv_module = PcvModule_I2C6;
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break;
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default:
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std::abort();
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}
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/* Set speed mode. */
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this->speed_mode = speed_mode;
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/* Setup interrupt event. */
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this->CreateInterruptEvent(bus);
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}
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}
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void I2cBusAccessor::Close() {
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std::scoped_lock<HosMutex> lk(this->open_mutex);
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/* Close current session. */
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this->open_sessions--;
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if (this->open_sessions > 0) {
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return;
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}
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/* Close interrupt event. */
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eventClose(&this->interrupt_event);
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/* Close PCV. */
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Pcv::Finalize();
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this->suspended = false;
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}
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void I2cBusAccessor::Suspend() {
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std::scoped_lock<HosMutex> lk(this->open_mutex);
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std::scoped_lock<HosMutex> lk_reg(this->register_mutex);
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if (!this->suspended) {
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this->suspended = true;
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if (this->pcv_module != PcvModule_I2C5) {
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this->DisableClock();
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}
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}
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}
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void I2cBusAccessor::Resume() {
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if (this->suspended) {
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this->DoInitialConfig();
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this->suspended = false;
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}
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}
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void I2cBusAccessor::DoInitialConfig() {
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std::scoped_lock<HosMutex> lk(this->register_mutex);
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if (this->pcv_module != PcvModule_I2C5) {
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Pcv::Initialize();
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}
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this->ResetController();
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this->SetClock(this->speed_mode);
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this->SetPacketMode();
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this->FlushFifos();
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}
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size_t I2cBusAccessor::GetOpenSessions() const {
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return this->open_sessions;
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}
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bool I2cBusAccessor::GetBusy() const {
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/* Nintendo has a loop here that calls a member function to check if busy, retrying a few times. */
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/* This member function does "return false". */
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/* We will not bother with the loop. */
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return false;
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}
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2019-05-02 13:36:31 +00:00
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void I2cBusAccessor::OnStartTransaction() const {
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/* Nothing actually happens here. */
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}
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void I2cBusAccessor::OnStopTransaction() const {
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/* Nothing actually happens here. */
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}
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Result I2cBusAccessor::StartTransaction(DriverCommand command, AddressingMode addressing_mode, u32 slave_address) {
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/* Nothing actually happens here... */
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return ResultSuccess;
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}
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2019-05-02 12:57:10 +00:00
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Result I2cBusAccessor::Send(const u8 *data, size_t num_bytes, I2cTransactionOption option, AddressingMode addressing_mode, u32 slave_address) {
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std::scoped_lock<HosMutex> lk(this->register_mutex);
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const u8 *cur_src = data;
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size_t remaining = num_bytes;
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Result rc;
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/* Set interrupt enable, clear interrupt status. */
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WriteRegister(&this->i2c_registers->I2C_INTERRUPT_MASK_REGISTER_0, 0x8E);
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WriteRegister(&this->i2c_registers->I2C_INTERRUPT_STATUS_REGISTER_0, 0xFC);
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ON_SCOPE_EXIT { this->ClearInterruptMask(); };
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/* Send header. */
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this->WriteTransferHeader(TransferMode_Send, option, addressing_mode, slave_address, num_bytes);
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/* Send bytes. */
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while (true) {
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const u32 fifo_status = ReadRegister(&this->i2c_registers->I2C_FIFO_STATUS_0);
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const size_t fifo_cnt = (fifo_status >> 4);
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for (size_t fifo_idx = 0; remaining > 0 && fifo_idx < fifo_cnt; fifo_idx++) {
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const size_t cur_bytes = std::min(remaining, sizeof(u32));
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u32 val = 0;
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for (size_t i = 0; i < cur_bytes; i++) {
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val |= cur_src[i] << (8 * i);
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}
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WriteRegister(&this->i2c_registers->I2C_I2C_TX_PACKET_FIFO_0, val);
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cur_src += cur_bytes;
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remaining -= cur_bytes;
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}
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if (remaining == 0) {
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break;
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}
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eventClear(&this->interrupt_event);
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if (R_FAILED(eventWait(&this->interrupt_event, InterruptTimeout))) {
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this->HandleTransactionResult(ResultI2cBusBusy);
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eventClear(&this->interrupt_event);
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return ResultI2cTimedOut;
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}
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if (R_FAILED((rc = this->GetAndHandleTransactionResult()))) {
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return rc;
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}
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}
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WriteRegister(&this->i2c_registers->I2C_INTERRUPT_MASK_REGISTER_0, 0x8C);
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/* Wait for successful completion. */
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while (true) {
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if (R_FAILED((rc = this->GetAndHandleTransactionResult()))) {
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return rc;
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}
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/* Check PACKET_XFER_COMPLETE */
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const u32 interrupt_status = ReadRegister(&this->i2c_registers->I2C_INTERRUPT_STATUS_REGISTER_0);
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if (interrupt_status & 0x80) {
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if (R_FAILED((rc = this->GetAndHandleTransactionResult()))) {
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return rc;
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}
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break;
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}
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eventClear(&this->interrupt_event);
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if (R_FAILED(eventWait(&this->interrupt_event, InterruptTimeout))) {
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this->HandleTransactionResult(ResultI2cBusBusy);
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eventClear(&this->interrupt_event);
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return ResultI2cTimedOut;
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}
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}
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return ResultSuccess;
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}
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Result I2cBusAccessor::Receive(u8 *out_data, size_t num_bytes, I2cTransactionOption option, AddressingMode addressing_mode, u32 slave_address) {
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std::scoped_lock<HosMutex> lk(this->register_mutex);
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u8 *cur_dst = out_data;
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size_t remaining = num_bytes;
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Result rc;
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/* Set interrupt enable, clear interrupt status. */
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WriteRegister(&this->i2c_registers->I2C_INTERRUPT_MASK_REGISTER_0, 0x8D);
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WriteRegister(&this->i2c_registers->I2C_INTERRUPT_STATUS_REGISTER_0, 0xFC);
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/* Send header. */
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this->WriteTransferHeader(TransferMode_Receive, option, addressing_mode, slave_address, num_bytes);
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/* Receive bytes. */
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while (remaining > 0) {
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eventClear(&this->interrupt_event);
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if (R_FAILED(eventWait(&this->interrupt_event, InterruptTimeout))) {
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this->HandleTransactionResult(ResultI2cBusBusy);
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this->ClearInterruptMask();
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eventClear(&this->interrupt_event);
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return ResultI2cTimedOut;
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}
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if (R_FAILED((rc = this->GetAndHandleTransactionResult()))) {
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return rc;
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}
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const u32 fifo_status = ReadRegister(&this->i2c_registers->I2C_FIFO_STATUS_0);
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const size_t fifo_cnt = std::min((remaining + 3) >> 2, static_cast<size_t>(fifo_status & 0xF));
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for (size_t fifo_idx = 0; remaining > 0 && fifo_idx < fifo_cnt; fifo_idx++) {
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const u32 val = ReadRegister(&this->i2c_registers->I2C_I2C_RX_FIFO_0);
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const size_t cur_bytes = std::min(remaining, sizeof(u32));
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for (size_t i = 0; i < cur_bytes; i++) {
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cur_dst[i] = static_cast<u8>((val >> (8 * i)) & 0xFF);
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}
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cur_dst += cur_bytes;
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remaining -= cur_bytes;
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}
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}
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/* N doesn't do ClearInterruptMask. */
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return ResultSuccess;
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}
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void I2cBusAccessor::SetBus(I2cBus bus) {
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this->bus = bus;
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this->i2c_registers = GetI2cRegisters(bus);
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this->clkrst_registers.SetBus(bus);
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}
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void I2cBusAccessor::CreateInterruptEvent(I2cBus bus) {
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static constexpr u64 s_interrupts[] = {
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0x46, 0x74, 0x7C, 0x98, 0x55, 0x5F
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};
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if (static_cast<size_t>(bus) >= sizeof(s_interrupts) / sizeof(s_interrupts[0])) {
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std::abort();
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}
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Handle evt_h;
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if (R_FAILED(svcCreateInterruptEvent(&evt_h, s_interrupts[static_cast<size_t>(bus)], 1))) {
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std::abort();
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}
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eventLoadRemote(&this->interrupt_event, evt_h, false);
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}
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void I2cBusAccessor::SetClock(SpeedMode speed_mode) {
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u32 t_high, t_low;
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u32 clk_div, src_div;
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u32 debounce;
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switch (speed_mode) {
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case SpeedMode_Normal:
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t_high = 2;
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t_low = 4;
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clk_div = 0x19;
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src_div = 0x13;
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debounce = 2;
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break;
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case SpeedMode_Fast:
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t_high = 2;
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t_low = 4;
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clk_div = 0x19;
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src_div = 0x04;
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debounce = 2;
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break;
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case SpeedMode_FastPlus:
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t_high = 2;
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t_low = 4;
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clk_div = 0x10;
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src_div = 0x02;
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debounce = 0;
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break;
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case SpeedMode_HighSpeed:
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t_high = 3;
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t_low = 8;
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clk_div = 0x02;
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src_div = 0x02;
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debounce = 0;
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break;
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default:
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std::abort();
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}
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if (speed_mode == SpeedMode_HighSpeed) {
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WriteRegister(&this->i2c_registers->I2C_I2C_HS_INTERFACE_TIMING_0_0, (t_high << 8) | (t_low));
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WriteRegister(&this->i2c_registers->I2C_I2C_CLK_DIVISOR_REGISTER_0, clk_div);
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} else {
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WriteRegister(&this->i2c_registers->I2C_I2C_INTERFACE_TIMING_0_0, (t_high << 8) | (t_low));
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WriteRegister(&this->i2c_registers->I2C_I2C_CLK_DIVISOR_REGISTER_0, (clk_div << 16));
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}
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WriteRegister(&this->i2c_registers->I2C_I2C_CNFG_0, debounce);
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ReadRegister(&this->i2c_registers->I2C_I2C_CNFG_0);
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if (this->pcv_module != PcvModule_I2C5) {
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if (R_FAILED(Pcv::SetReset(this->pcv_module, true))) {
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std::abort();
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}
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if (R_FAILED(Pcv::SetClockRate(this->pcv_module, (408'000'000) / (src_div + 1)))) {
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std::abort();
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}
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if (R_FAILED(Pcv::SetReset(this->pcv_module, false))) {
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std::abort();
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}
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}
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}
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void I2cBusAccessor::ResetController() const {
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if (this->pcv_module != PcvModule_I2C5) {
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if (R_FAILED(Pcv::SetReset(this->pcv_module, true))) {
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std::abort();
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}
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if (R_FAILED(Pcv::SetClockRate(this->pcv_module, 81'600'000))) {
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std::abort();
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}
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if (R_FAILED(Pcv::SetReset(this->pcv_module, false))) {
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std::abort();
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}
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}
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}
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void I2cBusAccessor::ClearBus() const {
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bool success = false;
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for (size_t i = 0; i < 3 && !success; i++) {
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|
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|
success = true;
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this->ResetController();
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WriteRegister(&this->i2c_registers->I2C_I2C_BUS_CLEAR_CONFIG_0, 0x90000);
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|
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SetRegisterBits(&this->i2c_registers->I2C_I2C_BUS_CLEAR_CONFIG_0, 0x4);
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SetRegisterBits(&this->i2c_registers->I2C_I2C_BUS_CLEAR_CONFIG_0, 0x2);
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SetRegisterBits(&this->i2c_registers->I2C_I2C_CONFIG_LOAD_0, 0x1);
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|
|
|
{
|
|
|
|
u64 start_tick = armGetSystemTick();
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|
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|
while (ReadRegister(&this->i2c_registers->I2C_I2C_CONFIG_LOAD_0) & 1) {
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|
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|
if (armTicksToNs(armGetSystemTick() - start_tick) > 1'000'000) {
|
|
|
|
success = false;
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|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!success) {
|
|
|
|
continue;
|
|
|
|
}
|
|
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|
|
SetRegisterBits(&this->i2c_registers->I2C_I2C_BUS_CLEAR_CONFIG_0, 0x1);
|
|
|
|
{
|
|
|
|
u64 start_tick = armGetSystemTick();
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|
|
|
while (ReadRegister(&this->i2c_registers->I2C_I2C_BUS_CLEAR_CONFIG_0) & 1) {
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|
|
|
if (armTicksToNs(armGetSystemTick() - start_tick) > 1'000'000) {
|
|
|
|
success = false;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!success) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
{
|
|
|
|
u64 start_tick = armGetSystemTick();
|
|
|
|
while (ReadRegister(&this->i2c_registers->I2C_I2C_BUS_CLEAR_STATUS_0) & 1) {
|
|
|
|
if (armTicksToNs(armGetSystemTick() - start_tick) > 1'000'000) {
|
|
|
|
success = false;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!success) {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void I2cBusAccessor::DisableClock() {
|
|
|
|
if (R_FAILED(Pcv::SetClockEnabled(this->pcv_module, false))) {
|
|
|
|
std::abort();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void I2cBusAccessor::SetPacketMode() {
|
|
|
|
/* Set PACKET_MODE_EN, MSTR_CONFIG_LOAD */
|
|
|
|
SetRegisterBits(&this->i2c_registers->I2C_I2C_CNFG_0, 0x400);
|
|
|
|
SetRegisterBits(&this->i2c_registers->I2C_I2C_CONFIG_LOAD_0, 0x1);
|
|
|
|
|
|
|
|
/* Set TX_FIFO_TRIGGER, RX_FIFO_TRIGGER */
|
|
|
|
WriteRegister(&this->i2c_registers->I2C_FIFO_CONTROL_0, 0xFC);
|
|
|
|
}
|
|
|
|
|
|
|
|
Result I2cBusAccessor::FlushFifos() {
|
|
|
|
WriteRegister(&this->i2c_registers->I2C_FIFO_CONTROL_0, 0xFF);
|
|
|
|
|
|
|
|
/* Wait for flush to finish, check every ms for 5 ms. */
|
|
|
|
for (size_t i = 0; i < 5; i++) {
|
|
|
|
if (!(ReadRegister(&this->i2c_registers->I2C_FIFO_CONTROL_0) & 3)) {
|
|
|
|
return ResultSuccess;
|
|
|
|
}
|
|
|
|
svcSleepThread(1'000'000ul);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ResultI2cBusBusy;
|
|
|
|
}
|
|
|
|
|
|
|
|
Result I2cBusAccessor::GetTransactionResult() const {
|
|
|
|
const u32 packet_status = ReadRegister(&this->i2c_registers->I2C_PACKET_TRANSFER_STATUS_0);
|
|
|
|
const u32 interrupt_status = ReadRegister(&this->i2c_registers->I2C_INTERRUPT_STATUS_REGISTER_0);
|
|
|
|
|
|
|
|
/* Check for no ack. */
|
|
|
|
if ((packet_status & 0xC) || (interrupt_status & 0x8)) {
|
|
|
|
return ResultI2cNoAck;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check for arb lost. */
|
|
|
|
if ((packet_status & 0x2) || (interrupt_status & 0x4)) {
|
|
|
|
this->ClearBus();
|
|
|
|
return ResultI2cBusBusy;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ResultSuccess;
|
|
|
|
}
|
|
|
|
|
|
|
|
void I2cBusAccessor::HandleTransactionResult(Result result) {
|
|
|
|
if (R_FAILED(result)) {
|
|
|
|
if (result == ResultI2cNoAck || result == ResultI2cBusBusy) {
|
|
|
|
this->ResetController();
|
|
|
|
this->SetClock(this->speed_mode);
|
|
|
|
this->SetPacketMode();
|
|
|
|
this->FlushFifos();
|
|
|
|
} else {
|
|
|
|
std::abort();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
Result I2cBusAccessor::GetAndHandleTransactionResult() {
|
|
|
|
Result rc = this->GetTransactionResult();
|
|
|
|
this->HandleTransactionResult(rc);
|
|
|
|
|
|
|
|
if (R_FAILED(rc)) {
|
|
|
|
this->ClearInterruptMask();
|
|
|
|
eventClear(&this->interrupt_event);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
return ResultSuccess;
|
|
|
|
}
|
|
|
|
|
|
|
|
void I2cBusAccessor::WriteTransferHeader(TransferMode transfer_mode, I2cTransactionOption option, AddressingMode addressing_mode, u32 slave_address, size_t num_bytes) {
|
|
|
|
this->FlushFifos();
|
|
|
|
|
|
|
|
WriteRegister(&this->i2c_registers->I2C_I2C_TX_PACKET_FIFO_0, 0x10);
|
|
|
|
WriteRegister(&this->i2c_registers->I2C_I2C_TX_PACKET_FIFO_0, static_cast<u32>(num_bytes - 1) & 0xFFF);
|
|
|
|
|
|
|
|
const u32 slave_addr_val = ((transfer_mode == TransferMode_Receive) & 1) | ((slave_address & 0x7F) << 1);
|
|
|
|
u32 hdr_val = 0;
|
|
|
|
hdr_val |= ((this->speed_mode == SpeedMode_HighSpeed) & 1) << 22;
|
|
|
|
hdr_val |= ((transfer_mode == TransferMode_Receive) & 1) << 19;
|
|
|
|
hdr_val |= ((addressing_mode != AddressingMode_7Bit) & 1) << 18;
|
|
|
|
hdr_val |= (1 << 17);
|
2019-05-03 02:32:03 +00:00
|
|
|
hdr_val |= (((option & I2cTransactionOption_Stop) == 0) & 1) << 16;
|
2019-05-02 12:57:10 +00:00
|
|
|
hdr_val |= slave_addr_val;
|
|
|
|
|
|
|
|
WriteRegister(&this->i2c_registers->I2C_I2C_TX_PACKET_FIFO_0, hdr_val);
|
|
|
|
}
|